upd69a Renesas Electronics Corporation., upd69a Datasheet

no-image

upd69a

Manufacturer Part Number
upd69a
Description
4-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
upd69aMC-709-5A4-E1-A
Manufacturer:
NEC
Quantity:
20 000
Document No. U16363EJ1V1DS00 (1st edition)
Date Published August 2005 N CP(K)
Printed in Japan
DESCRIPTION
function through key input, and programmable timer, the µ PD69A is ideal for infrared remote control transmitters.
quantity production.
FEATURES
APPLICATIONS
With its 2.0 V low-voltage operation, carrier generator for infrared remote control transmission, standby release
A one-time PROM product, the µ PD6P9, has also been provided for the µ PD69A for program evaluation or small-
• Program memory (ROM): 4,074 × 10 bits
• Data memory (RAM): 128 × 4 bits
• On-chip carrier generator for infrared remote control: Each high-/low-level width can be set from 250 ns to 64
• 9-bit programmable timer: 1 channel
• Instruction execution time: 16 µ s (normal instruction execution @ f
• Stack level:
• I/O pins (K
• Input pins (K
• Sense input pins (S
• S
• Power supply voltage:
• Operating ambient temperature: T
• Oscillator frequency:
• On-chip POC circuit and RAM retention detector
• Capacitor for oscillator: 15 pF (mask option)
Infrared remote control transmitters (for AV and household electrical appliances)
1
/LED pin (I/O):
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
I/O
FOR INFRARED REMOTE CONTROL TRANSMISSION
):
I
):
4-BIT SINGLE-CHIP MICROCONTROLLER
0
, S
2
): 2
8 µ s (high-speed instruction execution @ f
1 level (Stack RAM is multiplexed with data memory RF.)
8
4
1 (when in output mode, this is the remote control transmission display pin)
The mark
V
V
f
X
A
DD
DD
= 3.5 to 4.5 MHz
DATA SHEET
= –40 to +85°C
= 2.0 to 3.6 V
= 1.8 to 3.6 V (mask option)
shows major revised points.
µ s (@ f
MOS INTEGRATED CIRCUIT
X
= 4 MHz operation) via modulo registers
X
= 4 MHz operation)
X
= 4 MHz operation) (mask option)
µ PD69A
2002

Related parts for upd69a

upd69a Summary of contents

Page 1

SINGLE-CHIP MICROCONTROLLER FOR INFRARED REMOTE CONTROL TRANSMISSION DESCRIPTION With its 2.0 V low-voltage operation, carrier generator for infrared remote control transmission, standby release function through key input, and programmable timer, the µ PD69A is ideal for infrared remote control ...

Page 2

ORDERING INFORMATION Part Number µ PD69AMC-×××-5A4 20-pin plastic SSOP (7.62 mm (300)) µ PD69AMC-×××-5A4-A 20-pin plastic SSOP (7.62 mm (300)) Remarks 1. ××× indicates ROM code suffix. 2. Products that have the part numbers suffixed by “-A” are lead-free products. ...

Page 3

BLOCK DIAGRAM Carrier REM generator S /LED 9-bit timer 1 LIST OF FUNCTIONS Item ROM capacity 4,074 Mask ROM RAM capacity 128 Stack 1 level (multiplexed with RF of RAM) I/O pins • Key input (K • Key I/O (K ...

Page 4

PIN FUNCTIONS ............................................................................................................................ 1.1 List of Pin Functions .......................................................................................................... 1.2 Pin I/O Circuits .................................................................................................................... 1.3 Connection of Unused Pins .............................................................................................. 2. INTERNAL CPU FUNCTIONS ..................................................................................................... 2.1 Program Counter (PC) ........................................................................................................ 2.2 Stack Pointer (SP) ............................................................................................................... 2.3 Address Stack Register ...

Page 5

POC CIRCUIT ................................................................................................................................. 32 7.1 Functions of POC Circuit ................................................................................................... 33 7.2 Oscillation Check at Low Supply Voltage ........................................................................ 34 8. SYSTEM CLOCK OSCILLATOR .................................................................................................. 35 9. MASK OPTIONS ............................................................................................................................. 36 10. INSTRUCTION SET ....................................................................................................................... 37 10.1 Machine Language ...

Page 6

PIN FUNCTIONS 1.1 List of Pin Functions Pin No. Symbol 8-bit I/O port. Input/output can be specified in 8-bit units. I/O0 I/ input mode, the use of a pull-down resistor can be 15 ...

Page 7

Pin I/O Circuits The I/O circuits of pins of the PD69A are shown in partially simplified forms below. ( I/O0 I/O7 Output Data latch Output disable Input buffer Note The drive capacity is held low. (2) ...

Page 8

Connection of Unused Pins The following connections are recommended for unused pins. Table 1-1. Connection of Unused Pins Pin K Input mode I/O Output mode REM S /LED Caution The I/O mode ...

Page 9

INTERNAL CPU FUNCTIONS 2.1 Program Counter (PC): 12 Bits The program counter (PC binary counter that holds the address information of the program memory. Figure 2-1. Program Counter Configuration PC PC11 PC10 PC9 The PC contains the ...

Page 10

Program Memory (ROM): 4,074 Steps The ROM consists of 10 bits per step, and is addressed by the program counter. The program memory stores programs and table data, etc. The 22 steps from FEAH to FFFH of the PD69A ...

Page 11

Data Memory (RAM): 128 The data memory, which is a static RAM consisting of 32 The data memory is sometimes processed in 8-bit units page 0 can be used as the ROM data pointer page ...

Page 12

Data Pointer (DP): 12 Bits The ROM data table can be referenced by setting the ROM address in the data pointer to call the ROM contents. The lower 8 bits of the ROM address are specified ...

Page 13

Flags 2.9.1 Status flag (F) Pin and timer statuses can be checked by executing the STTS instruction to check the status flag. The status flag is set ( the following cases. • If the condition specified with ...

Page 14

PORT REGISTERS (PX) The K port, the K port, the special ports (S I/O I After reset, the port register values are as shown below. Figure 3-1. Port Register Configuration I/O7 I/O6 I/O5 P ...

Page 15

K Port (P0) I/O The K port is an 8-bit I/O port for key scan output. I/O I/O mode is set by bit 1 of the P4 register read instruction is executed, the pin state can be ...

Page 16

S port (bit 2 of P1) 0 The S port is an input/OFF mode port. 0 The pin state can be read by setting this port to input mode using bit 0 of the P4 register. In input mode, ...

Page 17

Control Register 0 (P3) Control register 0 consists of 8 bits. The contents that can be controlled are as shown below. After reset, the register becomes 0000 000B Note : Refers to the value based on a decrease of ...

Page 18

RAM retention flag (bit 3 of P3) The RAM retention flag indicates whether the supply voltage has fallen below the level at which the contents of the RAM are lost while the battery is being exchanged or when the ...

Page 19

Control Register 1 (P4) Control register 1 consists of 8 bits. The contents that can be controlled are as shown below. After reset, the register becomes 0010 0110B. Table 3-5. Control Register 1 (P4) Bit b 7 Name — ...

Page 20

TIMER 4.1 Timer Configuration The timer is the block used for creating a remote control transmission pattern. As shown in Figure 4-1, it consists of a 9-bit down counter ( flag ( ...

Page 21

Timer Operation The timer starts (counting down) when a value other than 0 is set for the down counter with a timer manipulation instruction. The timer manipulation instructions for making the timer start operation are shown below: MOV T0, ...

Page 22

By setting the flag (t ) that enables the timer output to 1, the timer can output its operation status from the S 9 LED pin and the REM pin. The REM pin can also output the carrier while the ...

Page 23

Carrier Output 4.3.1 Carrier output generator The carrier generator consists of a 9-bit counter and two modulo registers for setting the high- and low-level periods (MOD1 and MOD0 respectively). Figure 4-3. Configuration of Remote Controller Carrier Generator M11 t ...

Page 24

Carrier output control Remote controller carrier can be output from the REM pin by clearing (0) bit 9 (CARY) of the modulo register for setting the high-level period (MOD1). When performing carrier output, be sure to set the timer ...

Page 25

Output from the REM pin is as follows, in accordance with the values set to bit 9 (CARY) of MOD1 and the timer output enable flag (t ), and the value of the timer block’s 9-bit down counter (t 9 ...

Page 26

Software Control of Timer Output The timer output can be controlled by software. As shown in Figure 4-5, a pulse with a minimum width of 64/f – 4/f can be output during normal instruction execution, and a pulse with ...

Page 27

STANDBY FUNCTION 5.1 Outline of Standby Function To save current consumption, two types of standby modes, i.e., HALT mode and STOP mode, have been provided available. In STOP mode, the system clock stops oscillation. At this time, the X ...

Page 28

Standby Mode Setting and Release The standby mode is set with the HALT #b standby mode to be set, the status flag (F) is required to have been cleared (to 0). The standby mode is released by the release ...

Page 29

Table 5-3. Standby Mode Setting (HALT #b Operand Value of HALT Instruction Setting Mode STOP STOP Note STOP 1 Any of ...

Page 30

Standby Mode Release Timing (1) STOP mode release timing Figure 5-1. STOP Mode Release by Release Condition HALT instruction (STOP mode) Standby release signal Operation mode Oscillation Clock Note 284/f + (normal instruction execution), or 270/f X Caution When ...

Page 31

RESET A system reset is effected by the following causes: • When the POC circuit has detected low power-supply voltage • When the operand value is illegal or does not satisfy the precondition when the HALT instruction is executed ...

Page 32

POC CIRCUIT The POC circuit monitors the power supply voltage and applies an internal reset to the microcontroller when the battery is replaced. Cautions 1. There are cases in which the POC circuit cannot detect a low power supply ...

Page 33

Functions of POC Circuit The POC circuit has the following functions: • Generates an internal reset signal when V • Cancels an internal reset signal when V Here power supply voltage POC Figure 7-1. Timing ...

Page 34

Notes 1. Actually, oscillation stabilization wait time must elapse before the circuit is switched to operation mode. The oscillation stabilization wait time is about 534/f 2. For the POC circuit to generate an internal reset signal when the power supply ...

Page 35

SYSTEM CLOCK OSCILLATOR The system clock oscillator includes oscillators for ceramic resonators (f Ceramic resonator The system clock oscillator stops oscillating when a reset is applied or in STOP mode. Caution When using the system clock oscillator, wire as ...

Page 36

MASK OPTIONS The following mask options are provided in the PD69A. (1) Capacitor for oscillator • Not used Note • Used (15 pF) Note Under evaluation. Contact an NEC Electronics sales representative for details of the evaluation status. (2) ...

Page 37

INSTRUCTION SET 10.1 Machine Language Output by Assembler The bit length of the machine language of this product is 10 bits per word. However, the machine language that is output by the assembler is extended to 16 bits per ...

Page 38

Circuit Symbol Description A: Accumulator ASR: Address stack register addr: Program memory address CY: Carry flag data4: 4-bit immediate data data8: 8-bit immediate data data10: 10-bit immediate data F: Status flag M0: Modulo register for setting the low-level period ...

Page 39

Mnemonic to/from Machine Language (Assembler Output) Contrast Table Accumulator Operation Instructions Instruction Code Mnemonic Operand 1st Word 2nd Word ANL A, R0n FBEn A, R1n FAEn A, @R0H FAF0 A, @R0L FBF0 A, #data4 FBF1 data4 ORL A, R0n ...

Page 40

I/O Instructions Instruction Code Mnemonic Operand 1st Word 2nd Word IN A, P0n FFF8 + n — A, P1n FEF8 + n — OUT P0n, A E5F8 + n — P1n, A E4F8 + n — ANL A, P0n FBF8 ...

Page 41

Branch Instructions Instruction Code Mnemonic Operand 1st Word 2nd Word JMP addr (Page 0) E8F1 addr addr (Page 1) E9F1 addr addr (Page 2) E8F4 addr addr (Page 3) E9F4 addr JC addr (Page 0) ECF1 addr addr (Page 1) ...

Page 42

Timer Operation Instructions Instruction Code Mnemonic Operand 1st Word 2nd Word MOV A, T0 FFFF A, T1 FEFF A, M00 FFF6 A, M01 FEF6 A, M10 FFF7 A, M11 FEF7 T0, A E5FF T1, A F4FF M00, A E5F6 M01, ...

Page 43

Accumulator Manipulation Instructions ANL A, R0n ANL A, R1n <1> Instruction code <2> Cycle count: 1 <3> Function: (A) (A) CY The accumulator contents and the register Rmn contents are ANDed and the results ...

Page 44

ORL A, R0n ORL A, R1n <1> Instruction code <2> Cycle count: 1 <3> Function: (A) CY The accumulator contents and the register Rmn contents are ORed and the results are entered in the accumulator. ...

Page 45

XRL A, @R0H XRL A, @R0L <1> Instruction code 0 <2> Cycle count: 1 <3> Function: (A) ( (A) ( The accumulator contents and the ...

Page 46

I/O Instructions IN A, P0n IN A, P1n <1> Instruction code <2> Cycle count: 1 <3> Function: (A) CY The port Pmn data is loaded (read) onto the accumulator. OUT P0n, A OUT P1n, ...

Page 47

OUT Pn, #data8 <1> Instruction code <2> Cycle count: 1 <3> Function: (Pn) The immediate data is transferred to port Pn. In this case, port Pn ...

Page 48

MOV R0n, A MOV R1n, A <1> Instruction code <2> Cycle count: 1 <3> Function: (Rmn) The accumulator contents are transferred to register Rmn. MOV Rn, #data8 <1> Instruction code ...

Page 49

Branch Instructions The program memory consists of pages in steps of 1K (000H to 3FFH). However, as the assembler automatically performs page optimization unnecessary to designate pages. The pages allowed for each product are as follows. PD69A ...

Page 50

JNF addr <1> Instruction code: Page 0 Page <2> Cycle count: 1 <3> Function else PC If the status flag F is cleared (to 0), a jump is ...

Page 51

Timer Operation Instructions MOV A, T0 MOV A, T1 <1> Instruction code 0 <2> Cycle count: 1 <3> Function: (A) (Tn The timer register ...

Page 52

MOV A, M10 MOV A, M11 <1> Instruction code 0 <2> Cycle count: 1 <3> Function: (A) CY The modulo register M1n contents are transferred to the accumulator. M11 corresponds to ...

Page 53

MOV T, #data10 <1> Instruction code <2> Cycle count: 1 <3> Function: (T) data10 The immediate data is transferred to the ...

Page 54

MOV M0, @R0 <1> Instruction code <2> Cycle count: 1 <3> Function: (M0) Transfers the program memory contents to the modulo register M0 (t register P13 and the register pair ...

Page 55

STTS R0n <1> Instruction code <2> Cycle count: 1 <3> Function: if statuses match F else F Compares the and TIMER statuses with the register ...

Page 56

ASSEMBLER RESERVED WORDS 11.1 Mask Option Directives When creating a program in the PD69A necessary to use a mask option quasi directive in the assembler’s source program. 11.1.1 OPTION and ENDOP quasi directives The quasi directives from ...

Page 57

ELECTRICAL SPECIFICATIONS Absolute Maximum Ratings ( Item Symbol Power supply voltage V DD Input voltage I/O Output voltage V O Note Output current, high I REM OH LED One K Total for ...

Page 58

DC Characteristics (T = – Item Symbol Input voltage, high V K IH1 I IH2 I Input voltage, low V K IL1 I IL2 I Input leakage ...

Page 59

AC Characteristics (T = – Item Symbol Command execution time t When normal instruction execution is selected CY When high-speed instruction execution is selected high-level ...

Page 60

RECOMMENDED OSCILLATOR CONSTANT Ceramic Resonator (T = –40 to +85 C) (without on-chip capacitor for oscillator specified by mask option) A Manufacturer Part Number Frequency Recommended Constant (pF) Oscillation Voltage Range (V (MHz) Murata Mfg. CSTLS3M50G53-B0 3.5 Co., Ltd. CSTLS3M50G56-B0 ...

Page 61

CHARACTERISTIC CURVES (REFERENCE VALUES) (NORMAL INSTRUCTION EXECUTION) I vs MHz 0.9 0.8 0.7 0.6 Operation mode 0.5 0.4 0.3 0.2 0.1 0 1.5 2 2.5 3 Power supply voltage ...

Page 62

APPLICATION CIRCUIT EXAMPLE Example of Application in System • Remote-control transmitter (48 keys; mode selection switch supported) K I/ /LED 1 REM V DD Note 1 X OUT Note GND ...

Page 63

Remote-control transmitter (56 keys accommodated) K I/ /LED 1 REM V DD Note 1 X OUT Note GND Note Notes 1. When incorporation of a capacitor for ...

Page 64

Remote-control transmitter (56 keys supported, mode selection switch supported) Data can be read from the I/O0 pins (which then become high level when the switch is on and low level when off). Set the K to ...

Page 65

PACKAGE DRAWINGS 20-PIN PLASTIC SSOP (7.62 mm (300 NOTE Each lead centerline is located within 0. its true position (T.P.) at maximum material condition. Remark The external dimensions and ...

Page 66

RECOMMENDED SOLDERING CONDITIONS The µ PD69A should be soldered and mounted under the following recommended conditions. For soldering methods and conditions other than those recommended below, contact an NEC Electronics sales representative. For technical information, see the following website. ...

Page 67

APPENDIX A. DEVELOPMENT TOOLS An emulator is provided as an emulation tool and a PROM programmer and program adapter are provided as writing tools for the PROM product, the PD6P9. Hardware Note 1 Note 1, 2 • Emulator (EB-69 , ...

Page 68

APPENDIX B. FUNCTIONAL COMPARISON BETWEEN Item PD67A ROM capacity 1,002 10 bits RAM capacity 32 4 bits Stack 1 level (multiplexed with RF of RAM) Key matrix keys Key extended input ...

Page 69

APPENDIX C. EXAMPLE OF REMOTE-CONTROL TRANSMISSION FORMAT (in the case of NEC transmission format in command one-shot transmission mode) Caution When using the NEC transmission format, please apply to NEC Electronics for a custom code. (1) REM output waveform (From ...

Page 70

Carrier waveform (enlarged waveform of each code’s high period) REM output 8.77 s (6) Bit array of each code Leader code Custom code Caution To prevent malfunction ...

Page 71

NOTES FOR CMOS DEVICES 1 VOLTAGE APPLICATION WAVEFORM AT INPUT PIN Waveform distortion due to input noise or a reflected wave may cause malfunction. If the input of the CMOS device stays in the area between V malfunction. Take care ...

Page 72

Regional Information Some information contained in this document may vary from country to country. Before using any NEC Electronics product in your application, pIease contact the NEC Electronics office in your country to obtain a list of authorized representatives and ...

Page 73

MS-DOS is either a registered trademark or a trademark of Microsoft Corporation in the United States and/or other countries. PC/AT and PC DOS are trademarks of International Business Machines Corporation. These commodities, technology or software, must be exported in accordance ...

Related keywords