upd17207 Renesas Electronics Corporation., upd17207 Datasheet
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SINGLE-CHIP MICROCONTROLLER WITH LCD CONTROLLER/DRIVER AND A/D CONVERTER FOR INFRARED REMOTE CONTROL TRANSMITTERS DESCRIPTION The PD17201A, 17207 is a 4-bit single-chip microcontroller, used for infrared remote control transmitters, which in-tegrates an LCD controller/driver, A/D converter, and remote controller carrier ...
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APPLICATIONS • Infrared remote controller for air conditioner • Infrared remote controller with LCD display ORDERING INFORMATION Part Number PD17201AGF-xxx-3B9 80-pin plastic QFP ( mm) PD17207GF-xxx-3B9 80-pin plastic QFP ( mm) Remark xxx indicates ...
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PIN CONFIGURATION (TOP VIEW) ............................................................................................. 2. BLOCK DIAGRAM ......................................................................................................................... 3. PINS FUNCTIONS .......................................................................................................................... 3.1 PIN IDENTIFICATION ........................................................................................................................... 3.2 EQUIVALENT CIRCUITS OF PINS ..................................................................................................... 3.3 PROCESSING OF UNUSED PINS ...................................................................................................... 3.4 NOTES ON USING RESET AND INT PINS ........................................................................................ 4. ...
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A/D CONVERTER .......................................................................................................................... 46 9.1 CONFIGURATION OF A/D CONVERTER ........................................................................................... 9.2 FUNCTION OF A/D CONVERTER ...................................................................................................... 9.3 CONTROL REGISTERS OF A/D CONVERTER ................................................................................. 9.4 OPERATION IN A/D CONVERSION MODE ........................................................................................ 9.5 OPERATION IN COMPARE MODE ..................................................................................................... 10. SERIAL INTERFACE ...
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EXAMPLE OF APPLICATION CIRCUIT ....................................................................................... 110 20. PACKAGE DRAWINGS .................................................................................................................. 111 21. RECOMMENDED SOLDERING CONDITIONS............................................................................ 113 APPENDIX A. DIFFERENCES BETWEEN PD17P207 AND PD17201A/17207 .......................... 114 APPENDIX B. FUNCTIONAL COMPARISON OF PD17201A/17207 RELATED PRODUCTS ...... 115 APPENDIX C. DEVELOPMENT TOOLS ...
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PIN CONFIGURATION (TOP VIEW LCD 1 32 LCD 2 31 LCD 3 30 LCD 4 29 LCD 5 28 LCD 6 27 LCD 7 26 LCD 8 25 LCD 9 24 LCD 10 ...
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Pin Name ADC -ADC : A/D converter input 0 3 CAPH, CAPL : Booster capacitor connection COM -COM : LCD common signal output 0 3 GND, GND : Ground ADC INT : External interrupt request signal input LCD -LCD : ...
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BLOCK DIAGRAM P1A /SCK 0 P1A /SO P1A 1 P1A /SI 2 Serial interface P0A 0 P0A 1 P0A P0A 2 P0A 3 P0B 0 P0B 1 P0B P0B 2 P0B 3 P0C 0 P0C 1 P0C P0C 2 ...
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PINS FUNCTIONS 3.1 PIN IDENTIFICATION Pin No. Symbol 76 COM Common/segment signal outputs of the LCD driver. These 0 77 COM common and segment signal outputs are selected by LCDMD3 LCD /COM LCDMD0 of the register ...
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Pin No. Symbol 58 P1A /SCK Port 1A or serial interface P1A /SO Port 1A and serial interface are switched by SIOEN of the register file. 1 • 60 P1A /SI P1A to P1A 2 0 3-bit ...
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EQUIVALENT CIRCUITS OF PINS The followings are equivalent circuits (partially simplified) of the respective pins of the PD17207. (1) P0A Output data latch output disable Selector Input buffer (2) P0B Output data latch output disable Input buffer (3) P0C ...
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PROCESSING OF UNUSED PINS Process unused pins as follows: Table 3-1 Processing of Unused Pins (a) Port pins Pin Name Input mode P0A P0C P0D, P1A Output mode P0A (CMOS port) P0D, P1A (CMOS port) P0B, P0C (N-ch open-drain ...
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NOTES ON USING RESET AND INT PINS In addition to the functions shown in 3.1 PIN IDENTIFICATION, the RESET and INT pins also have a function to set a test mode (for IC testing) in which the internal operations ...
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MEMORY SPACE 4.1 PROGRAM COUNTER (PC) The program counter (PC) specifies an address of the program memory (ROM). The program counter is a 12-bit binary counter as shown in Fig. 4-1. Its contents are initialized to address 0000H at ...
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STACK A stack is a register to save a program return address and the contents of system registers (to be described later) when a subroutine is called or when an interrupt is accepted. 4.3.1 Stack Configuration A stack consists ...
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Function of Stack The address stack register stores a return address when the subroutine call instruction or table reference instruction (first instruction cycle) is executed or when an interrupt is accepted. It also stores the contents of the address ...
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DATA MEMORY (RAM) Data memory (random access memory) stores data for operations and control. It can be read-/write-accessed by instructions. 4.4.1 Memory Configuration Figure 4-4 shows the configuration of the data memory (RAM). The data memory consists of three ...
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General-purpose data memory The general-purpose data memory area is an area of the data memory excluding the system register area, the LCD register area, and the port register area. This memory area has a total of 300 nibbles (76 ...
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System Registers (SYSREG) The system registers are registers that are directly related to control of the CPU. These registers are mapped to addresses 74H-7FH on the data memory and can be referenced regardless of bank specification. The system registers ...
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General Register (GR) A general register is a 16-word register on the data memory and used for arithmetic operations and transfer of data to and from the data memory. (1) Configuration of general register Figure 4-7 shows the configuration ...
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Fig. 4-7 Configuration of General Registers General register pointer (RP) RPH RPL BANK0 ...
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Data Buffer (DBF) The data buffer on the data memory is used for data transfer to and from peripheral hardware and for storage of data during table reference. (1) Functions of the Data Buffer The data buffer has two ...
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Table 4-2 Relations between Peripheral Hardware and Data Buffer Peripheral Hardware Name Serial Interface Shift Register 8-bit Timer 8-bit counter 8-bit modulo register Remote Controller NRZ low-level period Carrier Generator setting modulo register Circuit NRZ high-level period setting modulo register ...
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Note on using data buffer When transferring data to/from the peripheral hardware via the data buffer, the unused peripheral addresses, write-only peripheral registers (only when executing PUT), and read-only peripheral registers (only when executing GET) must be handled as ...
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REGISTER FILE (RF) The register file mainly consists of registers that set the conditions of the peripheral hardware. These registers can be controlled by dedicated instructions PEEK and POKE, and the embedded macro instructions of AS17K, SETn, CLRn, and ...
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Control Registers The control registers consists of a total of 64 nibbles ( bits) of the addresses 00H-3FH of the register file. Of these, however, only 20 nibbles are actually used. The remaining 44 nibbles are unused ...
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Symbol definition of register file An error occurs if a register file address is directly specified as a numeral by the operand “rf” of the “PEEK WR, rf” or “POKE rf, WR” instruction if the 17K Series Assembler is ...
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PORTS 5.1 PORT 0A This port is a 4-bit I/O port. The four bits of this port are assigned all inputs or all outputs. This assignment is performed by P0AGIO of the register file. Transferring data from and to ...
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PORT 1A This port works as a 3-bit general I/O port and as serial interface. The I/O port or serial interface is selected by SIOEN of the register file. (1) Using the port 3-bit I/O port ...
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PORT CONTROL REGISTER 5.7.1 Switching between Input and Output of Grouped I/O Port A grouped I/O port is a port whose four bits are assigned all inputs or all outputs at a time. Grouped I/O ports are P0A, P0B, ...
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Switching between Input and Output of Bitwise I/O Port A bitwise I/O port is a port whose four bits are individually assigned inputs or output. The PD17207 supports only one bitwise I/O port: P0D. The bitwise input/output selection is ...
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Switching among Port, Timer Output, and LED Output The functions of port 0D (port, timer output, and LED output) are selected by settings of the TMOE and NRZEN bits of register file (TMOE for P0D and NRZEN for P0D ...
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CLOCK GENERATOR CIRCUIT The PD17207 contains two types of oscillator circuits: the main clock (X) and the subclock (XT) oscillator circuits. The clock oscillated by either of the circuits can be used as the system clock. Figure 6-1 shows ...
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SWITCHING SYSTEM CLOCK The system clock can be switched between the main clock and subclock by using the SYSCK flag (RF: address 02H, bit 1) as shown in Fig. 6-1. (1) Switching from main clock to subclock The system ...
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TIMER AND REMOTE CONTROLLER CARRIER GENERATOR CIRCUIT The 8-bit timer is mainly used to generate the leader pulse of the remote controller signal, and to output codes. Operations of timers are controlled by the GET instruction, the PUT ...
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Fig. 7-1 Configuration of 8-Bit Timer and Remote Controller Carrier Generator Circuit TMEN f /32 sys f /64 sys f //256 sys 6-bit counter sys Comparator 6-bit modulo register NRZLTMM 6-bit counter Comparator 6-bit ...
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FUNCTION OF THE 8-BIT TIMER (WITH MODULO FUNCTION) Fig. 7-2 8-Bit Timer Control Register Bit 3 Bit 2 Bit 1 RF: Address 33H TMEN TMRES TMCK1 R/W Read/write W R/W Default at reset 1 Note 0 Note This bit ...
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REMOTE CONTROLLER CARRIER GENERATOR The PD17207 is equipped with a circuit to generate carriers for the remote controller. This circuit consists of a 6-bit counter, a modulo register (NRZHTMM) to determine an NRZ high-level period, a modulo register (NRZLTMM) ...
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Fig. 7-4 Register to Control Output Signals of the Remote Controller RF: Address 12H Bit 3 Bit Read / write R R Default at reset 0 0 RF: Address 11H Bit 3 Bit Read ...
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Fig. 7-5 Input/Output Control Register for Port/Timer Output, LED Output, and Serial Interface RF: address 23H Bit 3 Bit Read/write R R/W Initial value at reset 0 0 7.3.2 Setting a Carrier Frequency ...
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Table 7-1 Example of Carrier Frequency (f Set Value NRZHTMM NRZLTMM 00H 00H 0.5 01H 02H 1.0 04H 04H 2.5 09H 09H 5.0 0FH 10H 8.0 0FH 21H 8.0 11H 21H 9.0 11H 22H 9.0 19H ...
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Countermeasures against Noise during Transmission When a signal is transmitted from the transmitter of a remote controller, a peak current of 0 may flow through the infrared LED. Since two batteries are usually used as the ...
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WATCH TIMER/WATCHDOG TIMER The watch timer is used to generate a watch interrupt signal and a signal to reset the watchdog timer. 8.1 CONFIGURATION OF WATCH TIMER/WATCHDOG TIMER Figure 8-1 shows the functional block diagram of the watch timer/watchdog ...
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FUNCTION OF WATCH TIMER/WATCHDOG TIMER Fig. 8-2 Watch Timer/Watchdog Timer Control Register RF: Address 03H Bit 3 Bit 2 WDTRES WTMMD WTMRES Read/write R/W W Default at reset Bit 1 Bit ...
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WATCHDOG TIMER OPERATION TIMING Unless the watchdog timer is reset in a fixed time, the WDOUT pin outputs a low level. By connecting the WDOUT pin to the RESET pin, a program hang-up can be detected by the watchdog ...
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A/D CONVERTER The PD17207 has an 8-bit successive approximation A/D converter. This A/D converter can be used in the following two modes. Mode A/D conversion mode Compare mode 9.1 CONFIGURATION OF A/D CONVERTER The 8-bit A/D converter consists of ...
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FUNCTION OF A/D CONVERTER 9.2.1 Function in A/D Conversion Mode In the A/D conversion mode, the A/D converter compares an analog voltage input to one of the pins ADC3 through AD0 with an internal reference voltage and outputs the ...
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CONTROL REGISTERS OF A/D CONVERTER 9.3.1 Operation Mode Register The operation mode register selects the operation mode and analog input pin(s) of the A/D converter by using the flags in the register file as illustrated below. RF: address 21H ...
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Internal Reference Voltage Setting Register (ADCR) The internal reference voltage setting register (ADCR 8-bit register that sets the reference voltage of the converter. This register is allocated to the peripheral hardware. Data is written to the ADCR ...
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OPERATION IN A/D CONVERSION MODE The timing necessary for A/D conversion differs depending on whether the main clock or subclock is selected as the system clock. (1) When main clock is selected as system clock The following wait times ...
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CMPVAL DAT 80H ADCNV: BANK0 INITFLG VREFEN,ADCEN,NOT ADCCH1,NOT ADCCH0 ; Starts sampling of input to ADC MOV DBF0, #CMPVAL AND 0FH MOV DBF1, #CMPVAL SHR 4 and 0FH REPT 9 NOP ENDR PUT ADCR,DBF NOP NOP NOP NOP PEEK WR,.MF.ADCCMP ...
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OPERATION IN COMPARE MODE In the compare mode, the result of comparison stored to ADCCMP is read and then the next comparison is immediately performed. Therefore, comparison is executed successively and the ADCCMP flag is rewritten accordingly. The timing ...
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When subclock is selected as system clock The following wait times must be set in software during compare operation. Wait time: Time of transition from operation stop mode to compare mode (2 instruction cycles) Sets compare mode (VREFEN, ADCEN, ...
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SERIAL INTERFACE Serial interface consists of an 8-bit shift register, a 4-bit shift mode register, and a 3-bit counter, and transmits data in series to and from the bus. 10.1 SERIAL INTERFACE FUNCTION 10.1.1 8-bit Data Transfer in Synchronization ...
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If the external clock is selected, the clock pulses supplied from the SCK pin are supplied to serial interface when the SIOTS flag is turned on (“1”). Similarly, when eight clock pulses are supplied to the serial interface, the SIOTS ...
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Fig. 10-2 Input/Output Control Register for Selection of Port, Timer Output, LED Output, and Serial Interface RF: Address 23H Bit 3 Bit 2 0 NRZEN Read/write R R/W Default at reset Bit 1 Bit 0 TMOE SIOEN ...
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Fig. 10-3 Serial Interface Control Register RF: Address 22H Bit 3 Bit 2 SIOTS SIOHIZ Read/write Default at reset 0 0 Caution Be sure to select a serial clock signal before starting transfer of serial data. Never set them at ...
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LCD CONTROLLER/DRIVER 11.1 CONFIGURATION OF LCD CONTROLLER/DRIVER The PD17207 is equipped with an LCD controller which generates segment and common signals according to the data set to the LCD register and a segment/common driver which can directly drive the ...
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FUNCTIONS OF LCD CONTROLLER/DRIVER The LCD controller/driver of the PD17207 features the following: (1) Automatically reads the LCD register and generates segment signals and common signals. (2) Three display modes available: • Display mode 1: 1/2-duty, 1/3-bias • Display ...
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Bit 3 Bit 2 RF: 32H LCDMD3 LCDMD2 LCDMD1 LCDMD0 Read/write R R Default at reset Fig. 11-2 Display Mode Register Bit 1 Bit 0 R/W R/W Read = R, Write = LCDMD0 _ ...
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Fig. 11-3 LCD Controller/Driver Control Register Bit 3 Bit 2 Bit 1 Bit 0 RF: 31H LCDEN LCDCK2 LCDCK1 LCDCK0 Read/write R/W R R/W R/W Default at reset Read = R, Write = W LCDCK0 _ ...
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Cautions 1. The LCD clock is supplied from the watch timer; therefore, the LCD flickers if the watch timer is reset during display. Do not reset the watch timer during display the main clock and subclock are used, ...
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LCD REGISTER The LCD register is resident on addresses 40H to 63H (LCDD0 to LCDD35) of BANK 0. The LCD controller/driver reads the LCD register independently of the operation of the CPU. The LCD controller controls segment signals according ...
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SEGMENT SIGNALS AND COMMON SIGNALS Segment pins LCD to LCD are connected to the corresponding front electrodes of the LCD panel and common 0 35 pins COM to COM are connected to corresponding rear electrodes of the LCD panel. ...
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Fig. 11-9 Common and Segment Waveforms for LCDEN = 0 (LCD Display Off) COM pin 0 COM pin 1 COM pin 2 COM pin 3 LCD pin n COM -LCD LCD2 V LCD1 V LCD0 GND V ...
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Fig. 11-10 Common and Segment Waveforms for LCDMD0 = 0 and LCDMD1 = 0 (Voltage Booster Circuit Stop) COM pin 0 COM pin 1 COM pin 2 COM pin 3 LCD pin n COM -LCD 0 n PD17201A, 17207 V ...
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VOLTAGE BOOSTER CIRCUIT FOR LCD DRIVER The PD17207 has a voltage booster circuit for LCD driver which prevents the LCD from flickering when the supply voltage fluctuates. Output signals and V LCD2 LCD1 LCD0 three ...
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Fig. 11-12 Operating Principle of LCD Driver Voltage Booster Circuit (1) Charge C1 with LCD0 LCD0 CAPH C1 V LCD0 CAPL LCDC (2) Charge C3 with V and voltage LCD0 CAPH ...
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INTERRUPT FUNCTIONS When a peripheral hardware unit (INT pin, 8-bit timer, clock timer, or serial interface) makes an interrupt request, the interrupt function temporarily stops the execution of the current program and transfers program control to a predetermined address ...
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EI/DI instruction Whether an accepted interrupt is executed or not is specified by the instruction. When the EI instruction is executed, INTE (interrupt enable flag), which enables the interrupt, is set to 1. The INTE flag ...
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Interrupt Enable Flags These flags enable the corresponding interrupts to be accepted. 1: The interrupt is accepted. 2: The interrupt is not accepted. RF: Address 2FH Bit 3 Bit ...
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Interrupt Request Flags These flags indicates the occurrence or acceptance of the corresponding interrupt requests. 1: The interrupt request has been made. 0: The interrupt request has been accepted possible to set the status of each Interrupt ...
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Fig. 12-3 Interrupt Request Flags (3/4) RF: Address 3DH Bit 3 Bit Read/write R R Default at reset 0 0 Fig. 12-3 Interrupt Request Flags (4/4) RF: Address 3EH Bit 3 Bit Read/write R ...
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INTERRUPT SEQUENCE If the IRQxx flag is set to “1” while the IPxx is “1”, processing of an interrupt starts at the end of the instruction cycle of the instruction being executed when the IRQxx flag was set. Processing ...
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STANDBY FUNCTIONS The PD17207 has two modes of standby functions: HALT mode and STOP mode. The standby functions reduce the power dissipation of the PD17207. In HALT mode, the PD17207 stops the execution of the program with the main ...
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Table 13-2 Operations after HALT Mode Has Been Released (a) HALT 02H Standby Mode Released by: Interrupt Enable Status Satisfaction of Release DI Condition by Interrupt Request (IRQTM) EI (b) HALT 08H Standby Mode Released by: Interrupt Enable Status Low ...
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CONDITIONS OF EXECUTING AN HALT INSTRUCTION The HALT instruction can be executed only under a specific condition for prevention of malfunction. See Table 13-3. The HALT instruction which does not satisfy the conditions listed in Table 13-3 is treated ...
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STOP MODE In STOP mode, the PD17207 stops the execution of the program with the main clock temporarily off for great reduction of its power dissipation. Execute a STOP instruction to set STOP mode. The STOP instruction is not ...
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CONDITIONS OF EXECUTING AN HALT INSTRUCTION The STOP instruction can be executed only under a specific condition for prevention of malfunction. See Table 13-5. The STOP instruction which does not satisfy the conditions listed in Table 13-5 is treated ...
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RESET 14.1 RESET BY RESET SIGNAL INPUT When a low-level signal is input to the RESET pin for more, the system is reset. The system must be reset at least once when the power is turned ...
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Table 14-1 Hardware Status after Reset Hardware Program Counter (PC) Port I/O Output Latch Data Memory (RAM) General-Purpose Data Memory (except DBF and port register) DBF System Register (SYSREG) WR Control Register 8-bit Timer Counter (TMC) Modulo Register (TMM) Remote ...
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ASSEMBLER RESERVED WORDS 15.1 MASK OPTION DIRECTIVES In PD17207 programming required to specify mask options in assembler source programs by mask option directives. The following mask options items must be specified: • Pull-up resistor for the RESET ...
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Mask Option Definition Pseudo Directives Table 15-1 shows directives available in the mask option definition block. Table 15-1 Mask Option Definition Directives Item Directives RESET pin pull-up OPTRES resistor System clock OPTCK Remark When both the main clock and ...
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Table 15-2 List of Reserved Symbols (1/4) Symbol Name Attribute Value DBF3 MEM 0.0CH DBF2 MEM 0.0DH DBF1 MEM 0.0EH DBF0 MEM 0.0FH AR3 MEM 0.74H AR2 MEM 0.75H AR1 MEM 0.76H AR0 MEM 0.77H WR MEM 0.78H BANK MEM ...
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Table 15-2 List of Reserved Symbols (2/4) Symbol Name Attribute Value LCDD16 MEM 0.50H LCDD17 MEM 0.51H LCDD18 MEM 0.52H LCDD19 MEM 0.53H LCDD20 MEM 0.54H LCDD21 MEM 0.55H LCDD22 MEM 0.56H LCDD23 MEM 0.57H LCDD24 MEM 0.58H LCDD25 MEM ...
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Table 15-2 List of Reserved Symbols (3/4) Symbol Name Attribute Value SP MEM 0.81H SYSCK FLG 0.82H.1 XEN FLG 0.82H.0 WDTRES FLG 0.83H.3 WTMMD FLG 0.83H.2 WTMRES FLG 0.83H.1 INT FLG 0.8FH.0 NRZBF FLG 0.91H.0 NRZ FLG 0.92H.0 ADCCMP FLG ...
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Table 15-2 List of Reserved Symbols (4/4) Symbol Name Attribute Value TMCK0 FLG 0.0B3H.0 P1AGIO FLG 0.0B7H.3 P0CGIO FLG 0.0B7H.2 P0BGIO FLG 0.0B7H.1 P0AGIO FLG 0.0B7H.0 IRQSIO FLG 0.0BBH.3 IRQWTM FLG 0.0BCH.2 IRQ FLG 0.0BDH.1 IRQTM FLG 0.0BEH.0 SIOSFR DAT ...
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PD17201A, 17207 91 ...
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Cdolumn 0 1 Address Row Address Bit Bit (8) Bit Bit 0 1 Bit Bit (9) Bit Bit 0 NRZBF 0 ...
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Cdolumn 8 9 Address Row Address Bit 3 Bit 2 0 (8) Bit 1 Bit 0 Bit 3 Bit 2 1 (9) Bit 1 Bit 0 Bit 3 Bit 2 2 (A) Bit 1 Bit 0 Bit 3 Bit 2 ...
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INSTRUCTION SET 16.1 OUTLINE OF INSTRUCTION SETS BIN HEX 0000 0 ADD 0001 1 SUB 0010 2 ADDC 0011 3 SUBC 0100 4 AND 0101 5 XOR 0110 6 OR INC INC MOVT ...
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LEGEND AR : Address register ASR : Address stack register specified by stack pointer addr : Program memory address (lower 11 bits) BANK : Bank register CMP : Compare flag CY : Carry flag DBF : Data buffer h ...
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LIST OF INSTRUCTION SETS Group Mnemonic Operand r, m (r) ADD m, #n4 ( (r) Addition ADDC m, #n4 ( INC (r) SUB m, #n4 (m) Subtraction r, m (r) SUBC ...
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Group Mnemonic Operand PUSH AR SP POP AR AR PEEK WR Transfer POKE rf, WR (rf) GET DBF, p (DBF) PUT p, DBF (p) PC 10–0 addr Branch BR PC 10–0 @ addr PC 10–0 CALL ...
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ASSEMBLER (AS17K) EMBEDDED MACROINSTRUCTIONS Legend flag n : FLG symbol n : Bit number < > : Can be omitted Mnemonic Operand Embedded SKTn flag 1, ... flag n macro SKFn flag 1, ... flag n SETn flag 1, ...
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ELECTRICAL SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS (T A Parameter Symbol Supply voltage V DD Analog supply voltage V ADC Input voltage V I Output voltage V O High-level output current I OH Low-level output current I OL Operating ambient temperature ...
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RECOMMENDED OPERATING RANGES (T Parameter Symbol V DD1 Supply voltage V DD2 V DD3 Main clock oscillation frequency f X Subclock oscillation frequency f XT (MHz 2.2 0 ...
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MAIN SYSTEM CLOCK OSCILLATOR CHARACTERISTICS (T Resonator Recommended Constants X X OUT IN Ceramic Note 3 oscillator OUT IN Crystal Note 3 oscillator C1 C2 Notes 1. The oscillation frequency is indicated only to express the ...
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RECOMMENDED OSCILLATORS Main System Clock Oscillator (made of ceramic) Manufacturer Part Name CSA3.58MG CSA4.00MG CSA4.19MG MURATA Mfg. CST3.58MGW CST4.00MGW CST4.19MGW KBR3.58MS KYOCERA KBR4.0MS KBR4.19MS TOKO CRHF4.00 DAISHINKU PRS0400BCSAN Main System Clock Oscillator (made of crystal) Frequency Manufacturer Holder (MHz) KINSEKI ...
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DC CHARACTERISTICS (T = – Parameter Symbol High-Level Input Voltage V IH1 V IH2 Low-Level Input Voltage V IL1 V IL2 High-Level Input Leakage Current I LIH1 I LIH2 Low-Level Input Leakage Current I LIL1 ...
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DC CHARACTERISTICS (T = – Parameter Symbol V IH1 High-Level Input Voltage V IH2 V IL1 Low-Level Input Voltage V IL2 I LIH1 High-Level Input Leakage current I LIH2 I LIL1 Low-Level Input Leakage current ...
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AC CHARACTERISTICS (T = – Parameter Symbol SCK Input Cycle Time t KCY , SCK Input High- and Low-Level t KH Widths Setup Time (vs. SCK ) t SIK SI Hold Time ...
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PERFORMANCE CURVE (REFERENCE VALUE) 4 OUT Ceramic oscillator 3.0 2.0 1.0 0 1.0 2.2 2.0 106 DD1 OUT Crystal resonator 32.768 kHz 3.0 4.0 5.0 Supply voltage V (V) ...
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(Operation mode) DD1 X 4.0 3.0 2.0 1 (HALT mode) DD2 X 3.0 2.0 1 PD17201A, 17207 ( ˚ ...
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I (REM OH1 (P1A OH2 ...
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I (REM Low level output voltage V I (P0B ...
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EXAMPLE OF APPLICATION CIRCUIT • Remote Controller for Air Conditioner 0. ...
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PACKAGE DRAWINGS PACKAGE DRAWINGS OF MASS-PRODUCTION PRODUCT 80 PIN PLASTIC QFP (14 20 NOTE Each lead centerline is located within 0.15 mm (0.006 inch) of its true position (T.P.) at maximum material ...
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ES PRODUCT PACKAGE DRAWINGS ES 80-PIN CERAMIC QFP (For Reference) (UNIT: mm 0.8 Bottom Caution 1. The metal cap is connected to pin 33 and is at the GND level. 2. Leads on the bottom of the package ...
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RECOMMENDED SOLDERING CONDITIONS For the PD17207, soldering must be performed under the following conditions. For details of recommended conditions for surface mounting, refer to information document “Semiconductor Device Mounting Technology Manual” (C10535E). For other soldering methods, please consult with ...
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APPENDIX A. DIFFERENCES BETWEEN The PD17P207 has a PROM to which the user can write a program in place of the internal mask ROM of the PD17201A and 17207. Therefore, the PD17P207 is identical to PD17201A and 17207 except for ...
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APPENDIX B. FUNCTIONAL COMPARISON OF Product Name PD17201A Item ROM Capacity (bits) 3072 RAM Capacity (bits) LCD Controller/Drive Infrared Remote Controller Carrier LED output is high-active Generator (REM) I/O Ports External Interrupt (INT) 1 line (rising-edge detection) Analog Input 4 ...
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APPENDIX C. DEVELOPMENT TOOLS The following tools are available for development of PD17207 progams: Hardware Name The IE-17K, IE-17K-ET, and EMU-17K are in-circuit emulators that can be commonly used with the 17K series products. The IE-17K and IE-17K-ET are connected ...
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Software Name Outline Machine AS17K is an assembler in common with the 17K series products. When 17K Series developing the program of the Assembler PD17201A and the (AS17K) AS17K is used in combination with a device file (AS17201A, AS17207). AS17201 ...
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NOTES FOR CMOS DEVICES 1 PRECAUTION AGAINST ESD FOR SEMICONDUCTORS Note: Strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop generation ...
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Regional Information Some information contained in this document may vary from country to country. Before using any NEC product in your application, please contact the NEC office in your country to obtain a list of authorized representatives and distributors. They ...
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SIMPLEHOST is a trademark of NEC Corporation MS-DOS and Windows are trademarks of Microsoft Corporation. PC/AT and PC DOS are trademarks of IBM Corporation. The application circuits and their parameters are for reference only and are not intended for use ...