upd78p058f Renesas Electronics Corporation., upd78p058f Datasheet - Page 24

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upd78p058f

Manufacturer Part Number
upd78p058f
Description
Mos Intergrated Circuit, 8-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet

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24
(1) Read mode
(2) Output disable mode
(3) Standby mode
(4) Page data latch mode
(5) Page write mode
(6) Byte write mode
(7) Program verify mode
(8) Program inhibit mode
Read mode is set if CE = L, OE = L are set.
Data output becomes high-impedance, and is in the output disable mode, if OE = H is set.
Therefore, it allows data to be read from any device by controlling the OE pin, if multiple PD78P058Fs are
connected to the data bus.
Standby mode is set if CE = H is set.
In this mode, data outputs become high-impedance irrespective of the OE status.
Page data latch mode is set if CE = H, PGM = H, OE = L are set at the beginning of page write mode.
In this mode, 1 page 4-byte data is latched in an internal address/data latch circuit.
After 1 page 4 bytes of addresses and data are latched in the page data latch mode, a page write is executed
by applying a 0.1-ms program pulse (active low) to the PGM pin with CE = H, OE = H. Then, program verification
can be performed, if CE = L, OE = L are set.
If programming is not performed by a one-time program pulse, X (X 10) write and verification operations should
be executed repeatedly.
Byte write is executed when a 0.1-ms program pulse (active low) is applied to the PGM pin with CE = L, OE =
H. Then, program verification can be performed if OE = L is set.
If programming is not performed by a one-time program pulse, X (X 10) write and verification operations should
be executed repeatedly.
Program verify mode is set if CE = L, PGM = H, OE = L are set.
In this mode, check if a write operation is performed correctly after the write.
Program inhibit mode is used when the OE pin, V
connected in parallel and a write is performed to one of those devices.
When a write operation is performed, the page write mode or byte write mode described above is used. At this
time, a write is not performed to a device which has the PGM pin driven high.
PP
pin, and D0 to D7 pins of multiple PD78P058Fs are
PD78P058F

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