lsm330dlc STMicroelectronics, lsm330dlc Datasheet - Page 35

• Manufacturer Part Number: lsm330dlc
• Description: Inemo Inertial Module 3d Accelerometer And 3d Gyroscope
• Manufacturer: STMicroelectronics

LSM330DLC
Data transfer only continues when the receiver is ready for another byte and releases the
data line. If a slave receiver does not acknowledge the slave address (i.e. it is not able to
receive because it is performing some real-time function) the data line must be left HIGH by
the slave. The master can then abort the transfer. A LOW to HIGH transition on the SDA line
while the SCL line is HIGH is defined as a STOP condition. Each data transfer must be
terminated by the generation of a STOP (SP) condition.
In order to read multiple bytes, it is necessary to assert the most significant bit of the sub-
address field. In other words, SUB(7) must be equal to 1 while SUB(6-0) represents the
address of first register to be read.
In the communication format presented, MAK is Master Acknowledge and NMAK is No
Master Acknowledge.
Default address:
The SDO/SA0 pin (SDO_A / SDO_G) can be used to modify the least significant bit of the
device address. If the SA0 pad is connected to voltage supply, the LSb is ‘1’ (ex. address
0011001b), otherwise if the SA0 pad is connected to ground, the LSb value is ‘0’ (ex
address 0011000b).
The slave address is completed with a Read/Write bit. If the bit was ‘1’ (Read), a repeated
START (SR) condition will have to be issued after the two sub-address bytes; if the bit is ‘0’
(Write) the master will transmit to the slave with direction unchanged.
explain how the SAD+Read/Write bit pattern is composed, listing all the possible
configurations.
Linear acceleration address: the default (factory) 7-bit slave address is
001100xb.
Table 16.
Angular rate sensor: the default (factory) 7-bit slave address is 110101xb.
Table 17.
Command
Command
Read
Write
Read
Write
Read
Write
Read
Write
Linear acceleration SAD+Read/Write patterns
Angular rate SAD+Read/Write patterns
SAD[6:1]
SAD[6:1]
001100
001100
001100
001100
110101
110101
110101
110101
Doc ID 022162 Rev 1
SAD[0] = SDO_A pin
SAD[0] = SDO_G pin
0
0
1
1
0
0
1
1
R/W
R/W
1
0
1
0
1
0
1
0
Table 16
00110001 (31h)
00110000 (30h)
00110011 (33h)
00110010 (32h)
11010101 (D5h)
11010100 (D4h)
11010111 (D7h)
11010110 (D6h)
Digital interfaces
SAD+R/W
SAD+R/W
and
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