cef830g Hope Microelectronics co., Ltd, cef830g Datasheet
cef830g
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cef830g Summary of contents
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RF 42/ 43 ISM T Features Frequency Range = 240–930 MHz Output Power Range +11 to +20 dBm (RF42) ◆ –8 to +13 dBm (RF43) ◆ Low Power Consumption (RF42) ◆ +20 dBm 27 ...
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Functional Block Diagram Tel: +86-755-82973805 Fax: +86-755-82973550 E-mail: sales@hoperf.com http://www.hoperf.com ...
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T C ABLE OF ONTENTS Section 1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . ….. . ….. . . . . . . . . ...
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Application Notes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . … ...
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Electrical Specifications Table 1. DC Characteristics Parameter Symbol Supply Voltage V dd Range Power Saving Modes I Shutdown I Standby I Sleep ISensor-L BD ISensor Ready I TUNE Mode Current Tune I TX Mode Current for TX_+20 ...
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Table 2. Synthesizer AC Electrical Characteristics Parameter Symbol F Synthesizer SYNTH-LB Frequency Range F SYNTH-HB F Synthesizer RES-LB Frequency F RES-HB 2 Resolution Reference f REF Frequency Reference Frequency Input f REF_LV 2 Level Synthesizer Settling t 2 Time LOCK ...
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Table 3. Transmitter AC Electrical Characteristics Symbol Parameter F TX Frequency SYNTH-LB 1 Range F SYNTH-HB FSK Modulation DR FSK 2 Data Rate OOK Modulation DR OOK 2 Data Rate Modulation Δf 1 Deviation Modulation Δf RES Deviation Resolution Output ...
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Table 4. Auxiliary Block Specifications Parameter Symbol Temperature Sensor TS 2 Accuracy Temperature Sensor TS 2 Sensitivity Low Battery Detector LBD 2 Resolution Low Battery Detector LBD 2 Conversion Time Microcontroller Clock Output Frequency MC General Purpose ADC ADC 2 ...
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Table 5. Digital IO Specifications (SDO, SDI, SCLK, nSEL, and nIRQ) Parameter Rise Time Fall Time Input Capacitance Logic High Level Input Voltage Logic Low Level Input Voltage Input Current Logic High Level Output Voltage Logic Low Level Output Voltage ...
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Table 7. Absolute Maximum Ratings Parameter V to GND GND on TX Output Pin DD Voltage on Digital Control Inputs Voltage on Analog Inputs Operating Ambient Temperature Range T Thermal Impedance θ JA Junction Temperature T J ...
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Definition of Test Conditions Production Test Conditions +25 ° +3.3 VDC DD External reference signal (XIN) = 1.0 V Production test schematic (unless noted otherwise) All RF input and output levels referred to ...
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Functional Description The RF42/ 100% CMOS ISM wireless transmitter with continuous frequency tuning over the complete 240–930 MHz band. The wide operating voltage range of 1.8–3.6 V and low current consumption makes the RF42/43 and ideal solution ...
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Controller Interface 3.1. Serial Peripheral Interface (SPI) The RF42/43 communicates with the host MCU over a 3 wire SPI interface: SCLK, SDI, and nSEL. The host MCU can also read data from internal registers on the SDO output pin. ...
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The SPI interface contains a burst read/write mode which will allows for reading/writing sequential registers without having to re-send the SPI address. When the nSEL bit is held low while continuing to send SCLK pulses, the SPI interface will automatically ...
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Operating Mode Control There are three primary states in the RF42/43 radio state machine: SHUTDOWN, IDLE, and TX (see Figure 5). The SHUTDOWN state completely shuts down the radio to minimize current consumption. There are five different configurations/options for ...
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Shutdown State The shutdown state is the lowest current consumption state of the device with nominally less than current consumption. The shutdown state may be entered by driving the SDN pin high. The SDN pin should ...
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TX State The TX state may be entered from any of the IDLE modes when the txon bit is set "Register 07h. Operating Mode and Function Control 1". A built-in sequencer takes care of all the ...
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Interrupts The RF42/43 is capable of generating an interrupt signal when certain events occur. The chip notifies the microcontroller that an interrupt event has been detected by setting the nIRQ output pin LOW = 0. This interrupt signal will ...
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System Timing The system timing for TX mode is shown in Figure 6. The timing is shown transitioning from STANDBY mode to TX mode and going automatically through the built-in sequencer of required steps small range of ...
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Frequency Control 3.6.1. Frequency Programming In order to transmit an RF signal, the desired channel frequency, fcarrier, must be programmed into the RF42/43.Note that this frequency is the center frequency of the desired channel and not an LO frequency. ...
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Value The chip will automatically shift the frequency of the Synthesizer down by 937.5 kHz ...
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Easy Frequency Programming for FHSS While Registers 73h–77h may be used to program the carrier frequency of the RF42/43 often easier to think in terms of ―channels‖ or ―channel numbers‖ rather than an absolute frequency value in ...
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The previous equation should be used to calculate the desired frequency deviation. If desired, frequency modulation may also be disabled in order to obtain an unmodulated carrier signal at the channel center frequency; see "4.1. Modulation Type" for further details. ...
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Frequency Offset Adjustment A frequency offset can be adjusted manually by fo[9:0] in registers 73h and 74h. The frequency offset adjustment is implemented by shifting the Synthesizer Local Oscillator frequency. This register is a signed register so in order ...
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Modulation Options 4.1. Modulation Type The RF42/43 supports three different modulation options: Gaussian Frequency Shift Keying (GFSK), Frequency Shift Keying (FSK), and On-Off Keying (OOK). GFSK is the recommended modulation type as it provides the best performance and cleanest ...
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Modulation Data Source The RF42/43 may be configured to obtain its modulation data from one of three different sources: FIFO mode, Direct Mode, and from a PN9 mode. Furthermore, in Direct Mode, the TX modulation data may be obtained ...
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PN9 Mode In this mode the TX Data is generated internally using a pseudorandom (PN9 sequence) bit generator. The primary purpose of this mode is for use as a test mode to observe the modulated spectrum without having to ...
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Internal Functional Blocks This section provides an overview some of the key blocks of the internal radio architecture. 5.1. Synthesizer An integrated Sigma Delta (ΣΔ) Fractional-N PLL synthesizer capable of operating from 240–930 MHz is rovided on-chip. Using a ...
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Power Amplifier The RF42 contains an internal integrated power amplifier (PA) capable of transmitting at output levels between +11 to +20 dBm. The output power is programmable steps through the txpow[2:0] field in "Register 6Dh. TX ...
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Crystal Oscillator The RF42/43 includes an integrated 30 MHz crystal oscillator with a fast start-up time of less than 600 μs when a suitable parallel resonant crystal is used. The design is differential with the required crystal load capacitance ...
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Data Handling and Packet Handler 6.1. TX FIFO A 64 byte FIFO is integrated into the chip for TX, as shown in Figure 10. "Register 7Fh. FIFO Access" is used to access the FIFO. A burst write, as described ...
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Function/Descri Add R/W ption Operating &Function 08 R/W Control 2 7C R/W TX FIFO Control 1 7D R/W TX FIFO Control 2 The TX FIFO may be cleared or reset with the ffclrtx bit in ―Register 08h. Operating Mode and ...
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Tel: +86-755-82973805 Fax: +86-755-82973550 E-mail: sales@hoperf.com http://www.hoperf.com 33 ...
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Data Whitening, Manchester Encoding, and CRC Data whitening can be used to avoid extended sequences the transmitted data stream to achieve a more uniform spectrum. When enabled, the payload data bits are XORed with ...
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Auxiliary Functions 7.1. Smart Reset T he RF42/43 contains an enhanced integrated SMART RESET or POR circuit. The POR circuit contains both a classic level threshold reset as well as a slope detector POR. This reset circuit was designed ...
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Microcontroller Clock The crystal oscillator frequency is divided down internally and may be output to the microcontroller through GPIO2. This feature is useful to lower BOM cost by using only one crystal in the system. The system clock frequency ...
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General Purpose ADC An 8-bit SAR ADC is integrated onto the chip for general purpose use, as well as for digitizing the temperature sensor reading. ―Register 0Fh. ADC Configuration,‖ must be configured depending on the use of the GP ...
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ADC Differential Input Mode—Bridge Sensor Example The differential input mode of ADC8 is designed to directly interface any bridge-type sensor, which is demonstrated in the figure below. As seen in the figure the use of the ADC in this ...
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The differential offset can be coarse compensated by the adcoffs[3:0] bits found in "Register 11h. ADC Value". Fine compensation should be done by the microcontroller software. The main reason for the offset compensation is to shift the negative offset voltage ...
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Temperature Sensor An analog temperature sensor is integrated into the chip. The temperature sensor will be automatically enabled when the temperature sensor is selected as the input of the ADC or when the analog temp voltage is selected on ...
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Figure 18. Temperature Ranges using ADC8 Tel: +86-755-82973805 Fax: +86-755-82973550 E-mail: sales@hoperf.com http://www.hoperf.com 41 ...
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Low Battery Detector A low battery detector (LBD) with digital read-out is integrated into the chip. A digital threshold may be programmed into the lbdt[4:0] field in "Register 1Ah. Low Battery Detector Threshold". When the digitized battery voltage reaches ...
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Wake-Up Timer The chip contains an integrated wake-up timer which periodically wakes the chip from SLEEP mode. The wake-up timer runs from the internal 32.768 kHz RC Oscillator. The wake-up timer can be configured to run when in SLEEP ...
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Interrupt Enable enwut=1 (Reg 06h) Figure 19. WUT Interrupt and WUT Operation Tel: +86-755-82973805 Fax: +86-755-82973550 E-mail: sales@hoperf.com http://www.hoperf.com 44 ...
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GPIO Configuration Three general purpose IOs (GPIOs) are available. Numerous functions such as specific interrupts, TRSW control, Microcontroller Output, etc. can be routed to the GPIO pins as shown in the tables below. When in Shutdown mode all the ...
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Reference Design Figure 20. RF43 Reference Design Schematic Table 15. Reference Design Bill of Materials Tel: +86-755-82973805 Fax: +86-755-82973550 E-mail: sales@hoperf.com http://www.hoperf.com ...
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Table 15. Reference Design Bill of Materials Tel: +86-755-82973805 Fax: +86-755-82973550 E-mail: sales@hoperf.com http://www.hoperf.com 47 ...
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Measurement Results RF42 Figure 24. TX Modulation (40 kbps, 20 kHz Deviation) Figure 25. RF43 TX Unmodulated Spectrum (917 MHz) Tel: +86-755-82973805 Fax: +86-755-82973550 E-mail: sales@hoperf.com http://www.hoperf.com ...
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Figure 26. RF43 TX Modulated Spectrum (917 MHz, 40 kbps, 20 kHz Deviation, GFSK) RF42 Figure 27. Synthesizer Settling Time for 1 MHz Jump Settled within 10 kHz Tel: +86-755-82973805 Fax: +86-755-82973550 E-mail: ...
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Figure 28. Synthesizer Phase Noise (VCOCURR = 11) Tel: +86-755-82973805 Fax: +86-755-82973550 E-mail: sales@hoperf.com http://www.hoperf.com 50 ...
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Application Notes 10.1. Crystal Selection The recommended crystal parameters are given in Table 16. Table 16. Recommended Crystal Parameters Frequency 30 MHz The internal XTAL oscillator will work over a range for the parameters of ESR, CL, C0, and ...
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Freq Band L1 R3 315 MHz 220 ohm 434 MHz 220 ohm 868 MHz 120 ohm 915 MHz 120 ohm 950 MHz 120 ohm Tel: +86-755-82973805 470pF ...
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Reference Material 11.1. Complete Register Table and Descriptions Tel: +86-755-82973805 Table 17. Register Descriptions Fax: +86-755-82973550 E-mail: sales@hoperf.com http://www.hoperf.com ...
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Table 17. Register Descriptions (Continued) Tel: +86-755-82973805 Fax: +86-755-82973550 E-mail: sales@hoperf.com http://www.hoperf.com 54 ...
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Register 00h. Device Type Code (DT) Bit D7 D6 Name Reserved Type Reset value = 00000111 Bit Name 7:5 Reserved 4:0 dt[4:0] Register 01h. Version Code (VC) Bit D7 D6 Name Reserved Type Reset value = xxxxxxxx Bit Name 7:5 ...
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Register 02h. Device Status Bit D7 D6 Name ffovfl ffunfl Type R R Reset value = xxxxxxxx Bit Name 7 ffovfl 6 ffunfl 5:4 Reserved 3:2 Reserved 1:0 cps[1:0] Tel: +86-755-82973805 D5 D4 Reserved Reserved Reserved ...
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Register 03h. Interrupt/Status 1 Bit D7 D6 Name ifferr itxffafull Type R R Reset value = xxxxxxxx Bit Name FIFO Underflow/Overflow Error. 7 ifferr When set to 1 the TX FIFO has overflowed or underflowed. TX FIFO Almost Full. 6 ...
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Table 18. Interrupt or Status 1 Bit Set/Clear Description Status Bit Name 7 ifferr Set if there is a FIFO overflow or underflow. Cleared by applying FIFO reset. Set when the number of bytes written to TX FIFO is greater ...
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Register 04h. Interrupt/Status 2 Bit D7 D6 Name Type Reset value = xxxxxxxx Bit Name 7：4 Reserved Reserved. Wake-Up-Timer. 3 iwut On the expiration of programmed wake-up timer this bit will be set to 1. Low Battery Detect. When a ...
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Table 20. Interrupt or Status 2 Bit Set/Clear Description Bit Name 7：4 Reserved Reserved. 3 iwut Wake time timer interrupt. Use as an interrupt, not as a status. Low Battery Detect. When a low battery event is been detected this ...
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Register 05h. Interrupt Enable 1 Bit D7 D6 Name enfferr entxffafull Type Reset value = 00000000 Bit Name Enable FIFO Underflow/Overflow. 7 enfferr When set to 1 the FIFO Underflow/Overflow interrupt will be enabled. Enable TX ...
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Register 06h. Interrupt Enable 2 Bit D7 D6 Name Type Reset value = 00000011 Bit Name 7:4 Reserved Reserved. Enable Wake-Up Timer. 3 enwut When set to 1 the Wake-Up Timer interrupt will be enabled. Enable Low Battery Detect. 2 ...
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Register 07h. Operating Mode and Function Control 1 Bit D7 D6 Name swres enlbd Type Reset value = 00000001 Bit Name Software Register Reset Bit. This bit may be used to reset all registers simultaneously to ...
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Register 08h. Operating Mode and Function Control 2 Bit D7 D6 Name Type Reset value = 00000000 Bit Name 7：4 Reserved Reserved. Automatic Transmission. When autotx = 1 the transceiver will enter automatically TX State when the 3 autotx FIFO ...
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Register 0Ah. Microcontroller Output Clock Bit D7 D6 Name Reserved Type R Reset value = xx000110 Bit Name 7:6 Reserved Reserved. Clock Tail. If enlfc = 0 then it can be useful to provide a few extra cycles for the ...
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Register 0Bh. GPIO Configuration 0 Bit D7 D6 Name gpiodrv0[1:0] w Type R/ Reset value = 00000000 Bit Name 7:6 gpiodrv0[1:0] GPIO Driving Capability Setting. Pullup Resistor Enable on GPIO0. When set to 1 the a 200 k r ...
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Register 0Ch. GPIO Configuration 1 Bit D7 D6 Name gpiodrv1[1:0] w Type R/ Reset value = 00000000 Bit Name 7:6 gpiodrv1[1:0] GPIO Driving Capability Setting. Pullup Resistor Enable on GPIO1. When set to 1 the a 200 k r ...
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Register 0Ch. GPIO Configuration 2 Bit D7 D6 Name gpiodrv2[1:0] w Type R/ Reset value = 00000000 Bit Name 7:6 gpiodrv2[1:0] GPIO Driving Capability Setting. Pullup Resistor Enable on GPIO2. When set to 1 the a 200 k r ...
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Register 0Eh. I/O Port Configuration Bit D7 D6 Name Reserved extitst[2] Type R R Reset value = 00000000 Bit Name 7 Reserved Reserved External Interrupt Status. 6 extitst[2] If the GPIO2 is programmed to be external interrupt sources then the ...
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Register 0Fh. ADC Configuration Bit D7 D6 adcstart/ Name adcdone Type R R Reset value = 00000000 Bit Name adcstart/adcdone 7 6:4 adcsel[2:0] 3:2 adcref[1:0] 1:0 adcgain[1:0] Tel: +86-755-82973805 D5 D4 adcsel[2: ADC Measurement Start Bit. Reading this ...
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Register 10h. ADC Sensor Amplifier Offset Bit D7 D6 Name Type Reset value = xxxx0000 Bit Name 7：4 Reserved Reserved. 3：0 adcoffs[3:0] ADC Sensor Amplifier Offset*. *Note: The offset can be calculated as Offset = adcoffs[2:0] x VDD / 1000; ...
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Register 12h. Temperature Sensor Calibration Bit D7 D6 Name tsrange[1:0] Type w R/ Reset value = 00100000 Bit Name tsrange[1:0] Temperature Sensor Range Selection. (FS range is 0..1024 mV) 00: 7：6 01: 11: 10: 5 entsoffs Temperature Sensor Offset to ...
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Register 14h. Wake-Up Timer Period 1 Bit D7 D6 Name Reserved Type w R/ Reset value = xxx00011 Bit Name 7：5 Reserved Reserved. Wake Up Timer Exponent (R) Value*. 4：0 wtr[4:0] Maximum value for R is decimal 20. A value ...
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Register 17h. Wake-Up Timer Value 1 Bit D7 D6 Name Type Reset value = xxxxxxxx Bit Name 7：0 wtm[15:8] Wake Up Timer Mantissa (M) Value*. *Note: The period of the wake-up timer can be calculated as T Register 18h. Wake-Up ...
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Register 1Ah. Low Battery Detector Threshold Bit D7 D6 Name Reserved Type R Reset value = xxx10100 Bit Name 7：5 Reserved Reserved. Low Battery Detector Threshold. 4：0 lbdt[4:0] This threshold is compared to Battery Voltage Level. If the Battery Voltage ...
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Register 30h. Data Access Control Bit D7 D6 Name Reserved lsbfrst Type Reset value = 10001101 Bit Name 7 Reserved Reserved. LSB First Enable. 6 lsbfrst The LSB of the data will be transmitted first if ...
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Register 31h. EZMAC Status ® Bit D7 D6 Name Type Reset value = 00000000 Bit Name 7:2 Reserved Reserved. Packet Transmitting. 1 pktx When pktx = 1 the radio is currently transmitting a packet. Packet Sent. 0 pksent A pksent ...
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Register 33h. Header Control 2 Bit D7 D6 Name Reserved Type R Reset value = 00100010 Bit Name 7 Reserved Reserved. Header Length. Length of header used if packet handler is enabled for TX (enpactx). Headers are transmitted in descending ...
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Register 34h. Preamble Length Bit D7 D6 Name Type Reset value = 00001000 Bit Name prealen[7:0] Preamble Length. The value in the prealen[8:0] register corresponds to the number of nibbles (4 bits) in the packet. For example prealen[8:0] = ‗000001000‘ ...
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Register 38h. Synchronization Word 1 Bit D7 D6 Name Type Reset value = 00000000 Bit Name sync[15:8] Synchronization Word 1. 7：0 2 Register 39h. Synchronization Word 0 Bit D7 D6 Name Type Reset value = 00000000 Bit Name Synchronization Word ...
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Register 3Bh. Transmit Header 2 Bit D7 D6 Name Type Reset value = 00000000 Bit Name txhd[23:16] Transmit Header 2. 7：0 3 Register 3Ch. Transmit Header 1 Bit D7 D6 Name Type Reset value = 00000000 Bit Name Transmit Header ...
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Register 3Eh. Packet Length Bit D7 D6 Name Type Reset value = 00000000 Bit Name Packet Length. The value in the pklen[7:0] register corresponds directly to the number of bytes in the Packet. For example pklen[7:0] = ‗00001000‘ corresponds to ...
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Register 51h. Digital Test Bus Select Bit D7 D6 Name Reserved ensctest Type R/W R/W Reset value = 00000000 Bit Name 7 Reserved Reserved. Scan Test Enable. 6 ensctest When set to 1 then GPIO0 will be the ScanEn input. ...
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Table 23. Internal Digital Signals Available on the Digital Test Bus (Continued) Tel: +86-755-82973805 Fax: +86-755-82973550 E-mail: sales@hoperf.com http://www.hoperf.com 84 ...
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Register 52h. TX Ramp Control Bit D7 D6 Name Reserved Type w R/ Reset value = 00101111 Bit Name 7 Reserved Reserved. TX Modulation Delay. The time delay between PA enable and the beginning of the TX modulation to 6:4 ...
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The total settling time (cold start) of the PLL after the calibration can be calculated as T Register 53h. PLL Tune Time Bit D7 D6 Name Type Reset value = 01010010 Bit Name PLL Soft Settling Time (T This register ...
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Register 55h. Calibration Control Bit D7 D6 Name Reserved xtalstarthalf Type Reset value = x1x00100 Bit Name 7 Reserved Reserved. 6 xtalstarthalf If Set, the Xtal Wake Time Period is Halved. 5 Reserved Reserved. RC Oscillator Fine ...
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Register 56h. Modem Test Bit D7 D6 Name bcrfbyp slicfbyp Type Reset value = 00000000 Bit Name 7 bcrfbyp If set, BCR phase compensation will be bypassed. 6 slicfbyp If set, slicer phase compensation will be ...
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Register 58h. Charge Pump Current Trimming/Override Bit D7 D6 Name cpcurr[1:0] Type w R/ Reset value = 100xxxxx Bit Name Charge Pump Current (Gain Setting). 7:6 cpcurr[1:0] Changing these bits will change the BW of the PLL. The default setting ...
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Register 5Ah. VCO Current Trimming Bit D7 D6 Name txcurboosten vcocorrov Type Reset value = 00000011 Bit Name If this is Set, then vcocur = 11 during TX Mode and VCO CAL followed by 7. txcurboosten ...
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Register 5Ch. Synthesizer Test Bit D7 D6 Name dsmdt vcotype Type Reset value = 0x001110 Bit Name Enable DSM Dithering. 7 dsmdt If low, dithering is disabled. VCO Type. 6 vcotype 0: basic, constant K 1: single ...
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Register 5Dh. Block Enable Override 1 Bit D7 D6 Name enmix enina Type R/W R/W Reset value = 00000000 Bit Name 7 enmix Mixer Enable Override. 6 LNA Enable Override. enina 5 enpga PGA Enable Override. 4 Power Amplifier Enable ...
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Register 5Fh. Block Enable Override 3 Bit D7 D6 Name enfrdv endv31 Type R/W R/W Reset value = 00000000 Bit Name 7 enfrdv Fractional Divider Enable Override. 6 Divider 3_1 Enable Override. endv31 5 endv2 Divider 2 Enable Override. 4 ...
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Register 62h. Crystal Oscillator/Power-on-Reset Control Bit D7 D6 Name pwst[2:0] Type R Reset value = xxx00100 Bit Name Internal Power States of the Chip. LP: 7:5 RDY: pwst[2:0] Tune: TX: 4 clkhyst Clock Hysteresis Setting. 3 enbias2x 2 Times Higher ...
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Register 63h. RC Oscillator Coarse Calibration/Override Bit D7 D6 Name rccov Type R/W Reset value = 00000000 Bit Name RC Oscillator Coarse Calibration Override. When rccov = 0 the internal Coarse Calibration results may be viewed by 7 rccov reading ...
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Register 65h. LDO Control Override Bit D7 D6 Name enspor enbias Type R/W R/W Reset value = 10000001 Bit Name 7 enspor Smart POR Enable. 6 Bias Enable. enbias 5 envcoldo VCO LDO Enable LDO Enable. enifldo 3 ...
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Register 6Bh. GFSK FIR Filter Coefficient Address Bit D7 D6 Name Type Reset value = xxxxx000 Bit Name 7:3 Reserved Reserved. GFSK FIR Filter Coefficient Look-up Table Address. The address for Gaussian filter coefficients used in the TX path. The ...
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Register 6Dh. TX Power Bit D7 D6 Name Type Reset value = xxxx1000 Bit Name 7:4 Reserved Reserved. LNA Switch Controller. 3 lna_sw If set, lna_sw control from the digital will go high during TX modes, and low during other ...
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Register 6Eh. TX Data Rate 1 Bit D7 D6 Name Type Reset value = 00001010 Bit Name Data Rate Upper Byte. 7:0 txdr[15:8] See formula above. The data rate can be calculated as: TX_DR = 10 The data rate can ...
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Register 70h. Modulation Mode Control 1 Bit D7 D6 Name Reserved Type R Reset value = 00001100 Bit Name 7:6 Reserved Reserved. 5 This bit should be set for Data Rates below 30 kbps. txdtrtscale If set, the Packet Handler ...
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Register 71h. Modulation Mode Control 2 Bit D7 D6 Name trclk[1:0] Type R/W Reset value = 00000000 Bit Name TX Data Clock Configuration. 00: 7:6 trclk[1:0] 01: 10: 11: Modulation Source. 00: 5:4 dtmod[1:0] 01: 10: 11 Data. ...
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Register 72h. Frequency Deviation Bit D7 D6 Name Type Reset value = 00100000 Bit Name Frequency Deviation Setting. 7:0 fd[7:0] See formula above. Note: It's recommended to use modulation index higher (maximum allowable modulation index is 32). ...
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Register 74h. Frequency Offset 2 Bit D7 D6 Name Type Reset value = 00000000 Bit Name 7:2 Reserved Reserved. Upper Bits of the Frequency Offset Setting. 1:0 fo[9:8] fo[9] is the sign bit. The frequency offset can be calculated as ...
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Register 76h. Nominal Carrier Frequency Bit D7 D6 Name Type Reset value = 10111011 Bit Name Nominal Carrier Frequency Setting. 7:0 fc[15:8] See formula above. Register 77h. Nominal Carrier Frequency Bit D7 D6 Name Type Reset value = 10000000 Bit ...
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Register 79h. Frequency Hopping Channel Select Bit D7 D6 Name Type Reset value = 00000000 Bit Name 7:0 Frequency Hopping Channel Number. fhch[7:0] Register 7Ah. Frequency Hopping Step Size Bit D7 D6 Name Type Reset value = 00000000 Bit Name ...
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Register 7Bh. Turn Around and 15.4 Length Compliance Bit D7 D6 Name 15.4 Length Type R/W Reset value = 01111011 Bit Name 15.4 Packet Length Compliance. If set, then PK Length definition for both TX and RX will also include ...
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Register 7Dh. TX FIFO Control 2 Bit D7 D6 Name Reserved Type R/W Reset value = 00000100 Bit Name 7：6 Reserved. Reserved 5：0 txfaethr[5:0] TX FIFO Almost Empty Threshold. Register 7Fh. FIFO Access Bit D7 D6 Name Type Reset value ...
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Pin Descriptions: RF42/43 Pin Pin Name I/O 1 VDD_RF VDD — — VR_PA I — GPIO_0 I/O 8 GPIO_1 I/O 9 GPIO_2 I/O 10 VDR O — 11 ...
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XIN I 26 SDN I PKG PADDLE_GND GND Tel: +86-755-82973805 Fax: +86-755-82973550 Xin pin with an external signal source. Crystal Oscillator Input. Connect to an external 30 MHz crystal external source. If using an external clock ...
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Package Information Figure 29 illustrates the package details for the RF42/43. Figure 30. QFN-20 Landing Pattern Dimensions Tel: +86-755-82973805 Figure 29. QFN-20 Package Dimensions Fax: +86-755-82973550 E-mail: sales@hoperf.com 110 http://www.hoperf.com ...
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Errata Status Summary Errat Title Current Consumption. Some non-standard frequencies are 2 not supported. Radio does not return to the low 3 power state when in Auto TX mode. Potential modem failure with default 4 ...
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Errata Details 1. Description: The TX current consumption at +13 dBm does not meet specification; lower power settings are within specification. Impact: May impact battery life. The +13 dBm current consumption versus the data sheet ...
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RF42: Parameter V to GND GND on TX Output Pin DD Voltage on Digital Control Inputs Voltage on Analog Inputs 7. Description: Wake-up Timer and Low Duty Cycle Modes not functional. Operating Ambient Temperature Range T Thermal ...