sc2441a Semtech Corporation, sc2441a Datasheet

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... The clock output signal enables two or more SC2441As to be daisy chained with programmable phase shift. Tying the FB2 pin to VIN makes the second step-down channel a slave of the first. Operating in this mode, the SC2441A regulates a single output with shared current in each channel ...

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... SC2441A ...

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... ° SC2441A = T < 105° > ...

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... SC2441A = T < 105° ...

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... TSSOP-28-EDP 25 BST1 package. (2) Lead free product. This product is fully WEEE and 24 PGND1 RoHS compliant. 23 GDH1 22 GDL1 21 VCC 20 GDL2 19 GDH2 18 BST2 17 SS2/EN2 16 CS2+ 15 CS2- 5 SC2441A ...

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... SC2441A ...

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... SC2441A ...

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... And DSBL1 Overload Hiccup Control 1 SEL CLK2 PWM2 S + TG2ON - A3 OL2 Soft-Start 1.25V And DSBL2 Overload Hiccup Control 2 8 SC2441A VIN UVLO 1.6/1.7V FAULT UVLO 4.3V/4.5V Adaptive Shoot-through Protection MUX Y Adaptive Shoot-through VCC Protection www.semtech.com IN 1 VCC 21 BST1 25 GDH1 ...

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... SLOPE COMP + + Σ Figure 3. Step-up Converter Functional Diagram + HICCUP DISABLE L1 0.5V/3. 0.8V 10µ “1” IF VCC < 4.5V SHDN = “1” IF SYNC/SHDN < 0.5V 9 SC2441A SW3 I-LIMIT R SENSE + ISEN3 - PGND2 26 OL (OVERLOAD DSBL R L2 TGON Soft-Start and Overload Hiccup Control Figure 2 www.semtech.com ...

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... PLLF C1 EXTERNAL PLL COMPENSATION QT TOGGLE FLIP-FLOP QT CLK1 CLK2 (a) CLK XCLK QT QT CKOUT CLK1 CLK2 GDH1 GDH2 (b) 10 SC2441A CURRENT- CONTROLLED OSCILLATOR + + V/I 0.4V ROSC - 10 R2 ROSC OPTIONAL RESISTOR FOR SETS FREE - SETTING PHASE RUNNNG SHIFT FREQUENCY CLK not Used) (b). 2 www.semtech.com ...

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... POWER MANAGEMENT Figure 6a. SC2441A Start-up Timing Diagram V SOFT-START-CAP Figure 6b. SC2441A Overload Hiccup Operation Timing Diagram 2006 Semtech Corp. Vcc 4.5V 1.85V 1.25V 0.8V Setpoint O 0.5V Disable Hiccup restart 11 SC2441A V SOFT-START 3.3V Enable Hiccup V COMP V OUT PWM 3.3V Enable Hiccup V COMP 1.85V V 1.25V O PWM www.semtech.com ...

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... Temperature (°C) 2006 Semtech Corp 100 125 = 66. 40.2K W OSC 50 75 100 125 50 75 100 125 12 SC2441A Step-down Channel Switching Frequency v s Temperature 650 R = 40.2K W OSC 600 550 R = 51.1K W OSC 500 450 R = 66.5K W OSC 400 350 -50 - ...

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... Current Sense Amplifier Input Bias Current vs Temperature (Non-inverting Pin) -0.40 -0.45 -0.50 -0. 8V CS1 (-) CS2 (-) -0.60 -50 - Temperature (°C) 13 SC2441A SYNC/SHDN Input Voltage vs Temperature 1.5 1.4 1.3 SYNC/SHDN Input High 1.2 1.1 1.0 SYNC/SHDN Input Low 0.9 -50 - 100 125 Temperature (°C) Clock Output Low Voltage vs Temperature 0.08 0.07 ...

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... Temperature (°C) V Start-up Threshold Voltage vs Temperature IN 1.75 1.74 1.73 1.72 1.71 1.70 -50 - 100 125 Temperature (°C) 14 SC2441A Soft-Start Voltage Threshold (to Enable Overload Hiccup Protection) vs Temperature 4.0 3.8 3.6 3.4 3.2 3.0 -50 - 100 125 Temperature (°C) Soft-Start Disable Voltage vs Temperature 0.83 0.81 0.79 0. =0.45V =2V ...

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... Temperature (°C) Boost Section Switch Current Limit vs Temperature 0.90 0.85 0.80 0.75 0.70 0.65 0.60 -50 - 100 125 Temperature (° 25° SC2441A Boost Section Amplifier Transconductance vs Temperature 105 125 -50 - Temperature (°C) Boost Section Switch Saturation Voltage vs Temperature 0.35 0.33 0.31 0.29 0. ...

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... Temperature (°C) Upper Gate Driver Transition Time vs Load 100 25° SC2441A Phase Shift vs Temperature 225 180 R = 34. 135 R = 46. 68. 51.1K W OSC R = 140K 400KHz 2 SYNC 0 -50 ...

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... The advantages of using a phase-locked loop (PLL) are: (i) when the step-down channels are synchronized, the auxiliary step- up regulator in the SC2441A can be made to run at twice the external clock frequency to reduce component size and (ii) two or more SC2441A can be daisy chained using the clock output (pin 28) and interleaved with programmable phase shift ...

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... Boost switch current is sensed with an integrated sense resistor with a minimum current-limit of 0.6A. Error Amplifiers All error amplifiers in the SC2441A are of transconductance type. Converters are compensated with series RC network from the COMP pins to the ground. An additional small parallel capacitor may be required for stability. ...

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... The 25mV maximum current sense voltage is the cycle-by- cycle peak current limit of the step-down controller. Gate Drivers The SC2441A uses an adaptive non-overlapping control scheme to switch the upper and the synchronous MOSFETs. The synchronous MOSFET of each step-down channel is turned off at the falling-edge of the phase clock ...

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... MOSFET is turned off. The propagation delay time from the turn-on of the controlling FET to its turn-off is the minimum switch on time. The SC2441A has a minimum on time of about 180ns at - 1.22 SW room temperature. This is the shortest on interval of the controlling FET ...

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... and V pin. They should be placed as close as possible IN to the pins of the SC2441A to achieve the best decoupling performance. Due to the different functionalities of the V pin and V CC placed between the V pin and the signal ground of the IN SC2441A ...

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... Output capacitor: Unlike buck converter, pulse current is delivered to the output of a boost converter. To reduce the output ripple voltage, low ESR capacitors should be used. The output capacitor should also be able handle the output ripple current. The SC2441A is designed to use multi-layer ceramic capacitor as the sole output capacitor. (peak-to- ...

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... When FAULT goes low gets charged via R from set different start-up times. SS must be large enough to allow the soft-start SS1 1 SS1/EN1 3 C SS1 SC2441A SS2 2 SS2/EN2 17 C SS2 Converters , as shown above, should be more SS SS1 www.semtech.com will be ...

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... Suppose V × =500KHz the peak-to- current limit is set at 28A. The time constant formed and and I CS+ CS × PEAK 24 SC2441A Voltage on C --- V ( C1.PEAK L1.PEAK V C1.VALLEY L1.VALLEY Voltage Drop on R --- I (t Figure 13. Voltage Waveform C ...

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... V range. In this case, the resistor from the PLLF pin should not be connected to the V blocking capacitor in the converter. The SC2441A will not switch if the PLLF pin is at zero volt. Applying more than 2.1V at the PLLF pin activates the diode clamp circuit (see Figure 5(a)). The filtering components (R needed while free-running ...

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... In the Master-Slave mode, the SS2441A can be synchronized to an external clock signal applied to the SYNC pin. External filtering componets (R on the PLLF pin are necessary for the slave SC2441A . The PLLF pull-up resistor is not necessary for the slave converter. Phase shift between the master and the slave is the phase lag measured between the sync input and the clock output of the slave ...

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... The required ESR value of the output capacitors should the aluminum capacitor selection, the working voltage at time t=0. rating is normally suggested to be greater than 1.5V o The allowable current ripple (RMS) should be greater than 27 SC2441A * I , the ripple-voltage caused » ...

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... A simple buck converter is shown in Figure 18. Figure 18. Buck converter input model + shown in Fig. 18, the internal DC input voltage source SC2441A ...

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... The two step-down channels of the SC2441A operate at 180 degrees from each other. If both step- down channels in the SC2441A are connected in parallel, both the input and the output RMS currents will be reduced. Ripple cancellation effect of interleaving allows the use of smaller input capacitors ...

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... The switching losses can be estimated using the simple formula where t switching process. To clarify these, we sketch the typical MOSFET switching characteristics under clamped inductive mode in Figure 21. g and C ds(on SC2441A rms o 12 ...

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... Actual temperature measurement of the prototype should be carried out to verify the thermal design. Integrated Power MOSFET Drivers There are four internal MOSFET drivers in a dual- channel step-down converter. 31 SC2441A ...

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... There is no benefit except higher dissipation if you further increase the MOSFET gate drive voltage recommended to select gate drive voltage (V pin) of the SC2441A in between 5V to 7V. CC Setting the Output Voltage of the Step-down Section The non-inverting inputs of the error amplifiers are internally biased to 0 ...

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... Applications Information The inner current-loop is unstable (sub-harmonic oscillation) unless the inductor current up-slope is steeper than the inductor current down-slope. For stable operation above 50% duty-cycle, a compensation ramp is added to the sensed-current. In the SC2441A the compensation ramp is made duty-ratio dependent. The compensation ramp is approximately = × ...

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... C =0.33nF. 2 use R =357k . further calculated that use C =22pF. The Bode plots of the loop transfer function 3 (magnitude and phase) are shown in Fig. 25. 34 SC2441A >> simplify design, one usually assumes << and specifies the loop 2 oesr The loop crossover frequency ...

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... Circuit board layout is very important for the proper operation of high frequency switching power converters. A power ground plane is required to reduce ground bounces. The followings are suggested for proper layout. Power Stage 1) Separate the power ground from the signal ground. In SC2441A the power ground PGND1 should be tied ...

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... Use an isolated local ground plane for the controller and tie it to the negative side of output capacitor bank. 10) A large copper area underneath the SC2441A IC is nessary for heat sinking purpose. And multiple layers of large copper area connected through vias can be used for better thermal performance ...

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... THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY. CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR COMPANY'S MANUFACTURING GUIDELINES ARE MET. Semtech Corporation Power Management Products Division 200 Flynn Road, Camarillo, CA 93012-8790 Phone: (805)498-2111 FAX (805)498-3804 37 SC2441A DIMENSIONS INCHES MILLIMETERS MIN NOM MAX MIN ...