st72321j STMicroelectronics, st72321j Datasheet - Page 148
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st72321j
Manufacturer Part Number
st72321j
Description
8-bit Mcu With Nested Interrupts, Flash, 10-bit Adc, 5 Timers, Spi, Sci, I2c Interface
Manufacturer
STMicroelectronics
Datasheet
1.ST72321J.pdf
(179 pages)
- Current page: 148 of 179
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ST72321J
CLOCK CHARACTERISTICS (Cont’d)
12.5.5 Clock Security System (CSS)
Note:
1. Data based on characterization results.
12.5.6 PLL Characteristics
Note:
1. Data characterized but not tested.
Figure 79. PLL Jitter vs. Signal frequency
Note 1: Measurement conditions: f
148/179
Operating conditions: V
f
V
f
SFOSC
OSC
f
Symbol
CPU
DD(PLL)
Symbol
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
/ f
CPU
2000
Safe Oscillator Frequency
PLL Operating Range
PLL input frequency range
Instantaneous PLL jitter
Application Signal Frequency (KHz)
1000
Parameter
Parameter
DD
500
3.8 to 5.5V @ T
250
CPU
1)
1)
PLL ON
PLL OFF
= 4MHz, T
125
T
T
f
f
OSC
OSC
A
A
A
1
0 to 70° C
0 to 70
-40 to +125
= 4 MHz.
= 2 MHz.
A
Conditions
Conditions
= 25° C
°C
The user must take the PLL jitter into account in
the application (for example in serial communica-
tion or sampling of high frequency signals). The
PLL jitter is a periodic effect, which is integrated
over several CPU cycles. Therefore the longer the
period of the application signal, the less it will be
impacted by the PLL jitter.
Figure 79
cation signals in the range 125kHz to 2MHz. At fre-
quencies of less than 125KHz, the jitter is negligi-
ble.
1)
°C
or V
DD
4.5 to 5.5V @ T
shows the PLL jitter integrated on appli-
Min
Min
3.8
4.5
2
Typ
A
3
Typ
-40 to 125° C
1.0
2.5
Max
Max
5.5
5.5
2.5
4.0
4
MHz
Unit
MHz
Unit
%
%
V
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