fm3316 Ramtron Corporation, fm3316 Datasheet - Page 25

• Manufacturer Part Number: fm3316
• Description: 3v Integrated Processor Companion With Memory
• Manufacturer: Ramtron Corporation

3
4
Capacitance (T
Notes
1
2
Data Retention (V
AC Test Conditions
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing Levels
Output (SO) Load Capacitance
Diagram Notes
All timing parameters apply to both read and write cycles. Clock specifications are identical for read and write cycles. Write
timing parameters apply to op-code, word address, and write data bits. Functional relationships are illustrated in the relevant data
sheet sections. These diagrams illustrate the timing parameters only.
Serial Data Bus Timing
Rev. 1.1
Dec. 2007
C
C
C
Data Retention
Symbol
SCK
XTL
CNT
IO
SO
CS
t
satisfied. The StartTime has a resolution of 25ms. The EndTime has a resolution of 60ms.
The /RST pin will drive low for this amount of time after the internal reset circuit is activated due to a watchdog, low
voltage, or manual reset event.
This parameter is characterized but not tested.
The crystal attached to the X1/X2 pins must be rated as 12.5pF.
SI
DOG1
is the programmed StartTime and t
Input/Output Capacitance
X1, X2 Crystal pin Capacitance
Max. Allowable Capacitance on CNT (polled mode)
Parameter
A
t
CSU
= 25 C, f=1.0 MHz, V
DD
t
SU
= 2.7V to 3.6V)
t
H
1 / t
Parameter
CK
10% and 90% of V
5 ns
0.5 V
30 pF
DOG2
DD
DD
t
= 3.0V)
ODV
is the programmed EndTime in registers 0Bh and 0Ch, V
Min
10
t
F
DD
Years
Units
t
OH
t
R
FM33256/FM3316 SPI Companion w/ FRAM
Typ
25
-
-
Notes
t
CL
Max
100
8
-
t
CH
Units
pF
pF
pF
DD
> V
t
TP
CSH
, and t
Notes
t
Page 25 of 28
D
t
1, 2
OD
1
RPU