t71l6808a TM Technology Inc., t71l6808a Datasheet - Page 14

• Manufacturer Part Number: t71l6808a
• Description: Octal 10/100 Switch With Embedded Memory
• Manufacturer: TM Technology Inc.

Management Interface (MI)
MDC
MDIO
Serial EEPROM 24LC02 Interface
SCLK
SDA
Mode Pins (Reset-read)
ENBKPRS
ENFCTRL
Test Pin
TEST
TEST_MOD
[2:0]
TEST_OP1
TEST_OP2
ARL_LOOP
ARL_PAIR
Taiwan Memory Technology, Inc. reserves the right
to change products or specifications without notice.
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CH
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I/O
I/O
O
O
O
O
I
I
I
I
I
I
33, 41, 42 Test Pin.
121
122
107
112
106
125
43
44
56
57
55
Management Interface (MI) Clock Output.
This MI clock shifts serial data in and out of MDIO on rising
edges from an external Physical Layer device.
Management Interface (MI) Data I/O.
This bi-directional pin contains serial data that is clocked in and
out on rising edges of the MDC clock from an external Physical
Layer device.
Serial Clock.
Internally pulled high.
Serial Data Input/Output.
Internally pulled high.
Enable Half Duplex Back Pressure Function.
Pulled high upon reset will enable the back pressure function.
Pulled low upon reset will disable the back pressure function.
Enable Full Duplex Flow Control.
Pulled high upon reset will enable the full duplex IEEE802.3x
flow control function. The flow control ability will be write to
the management register 4 of PHY device one and only one
time after power-on reset, for advertising.
Pulled low upon reset will disable the flow control function.
Test Pin.
For internal use. Must be tied to ground for normal use.
For internal use.
SSRAM Test Output.
For internal test.
SSRAM Test Output.
For internal test.
Test Pin.
For internal use. Must be tied to ground for normal use.
Test Pin.
For internal use. Must be tied to ground for normal use.
P. 14
Preliminary T71L6808A
Publication Date:May. 2001
Revision:0.A