isl62883c Intersil Corporation, isl62883c Datasheet - Page 20

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isl62883c

Manufacturer Part Number
isl62883c
Description
Multiphase Pwm Regulator For Imvp-6.5? Mobile Cpus And Gpus
Manufacturer
Intersil Corporation
Datasheet

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To
External
Driver
Tied to
5V
Modes of Operation
The ISL62883C can be configured for 3, 2 or 1-phase
operation.
For 2-phase configuration, tie the PWM3 pin to 5V. In this
configuration, phases 1 and 2 are active. For 1-phase
configuration, tie the ISEN2 pin to 5V. In this
configuration, only phase-1 is active.
PWM3 ISEN2 CLK_EN#
3-phase CPU
Config.
3-phase GPU
Config.
2-phase CPU
Config.
2-phase GPU
Config.
1-phase CPU
Config.
1-phase GPU
Config.
CONFIG.
TABLE 3. ISL62883C MODES OF OPERATION
TABLE 2. ISL62883C CONFIGURATIONS
To
Power
Stage
Tied to
5V
PSI# DPRSLPVR
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
x
x
External
pull-up
Tied to
GND or
floating
External
pull-up
Tied to
GND or
floating
x
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
20
R
(kΩ)
147
147
147
147
147
BIAS
47
47
47
47
47
OPERATIONAL
2-phase CCM
3-phase CCM
1-phase DE
1-phase DE
2-phase CCM
3-phase CCM
1-phase DE
1-phase DE
1-phase CCM
2-phase CCM
1-phase DE
1-phase DE
1-phase CCM
2-phase CCM
1-phase DE
1-phase DE
1-phase CCM
1-phase DE
1-phase CCM
1-phase DE
3-phase
CPU VR
3-phase
GPU VR
2-phase
CPU VR
2-phase
GPU VR
1-phase
CPU
1-phase
GPU
CONFIG.
MODE
OVERSHOOT
REDUCTION
FUNCTION
See Table 4
Disabled
Disabled
Disabled
Disabled
Enabled
Enabled
Enabled
Enabled
10mV/µs
10mV/µs
10mV/µs
5mV/µs
5mV/µs
5mV/µs
SLEW
RATE
ISL62883C
Table 2 shows the ISL62883C configurations,
programmed by the PWM3 pin, the ISEN2 pin, the
CLK_EN# pin status and the R
When the ISL62883C is in 3- or 2-phase configuration,
external pull-up on the CLK_EN# pin puts the ISL62883C
in CPU VR configuration; Tying the CLK_EN# pin to GND
or leaving it floating puts the ISL62883C in GPU VR
configuration. In 3- or 2-phase configuration,
R
and R
If the PWM3 pin and the ISEN2 pin are both tied to 5V,
the ISL62883C is in 1-phase configuration. The CLK_EN#
pin status has no effect. R
ISL62883C in CPU VR configuration and R
puts the ISL62883C in GPU configuration. In 1-phase
configuration, the enabling and disabling of the
overshoot reduction function are programmed by the
resistance from COMP to GND, as Table 4 shows.
Table 3 shows the ISL62883C operational modes,
programmed by the logic status of the PSI# and the
DPRSLPVR pins.
In 3-phase configuration, the ISL62883C enters 2-phase
CCM for (PSI# = 0 and DPRSLPVR = 0). It drops phase 3
and operates phases 1 and 2 180° out-of-phase. It also
reduces the overcurrent and the way-overcurrent
protection levels to 2/3 of the initial values. The
ISL62883C enters 1-phase DE mode for DPRSLPVR = 1
by dropping phase 2 and reduces the overcurrent and
the way-overcurrent protection levels to 1/3 of the initial
values.
In 2-phase configuration, the ISL62883C enters 1-phase
CCM for (PSI# = 0 and DPRSLPVR = 0). It drops phase 2
and reduces the overcurrent and the way-overcurrent
protection levels to 1/2 of the initial values. The
ISL62883C enters 1-phase DE mode for DPRSLPVR = 1
by dropping phase 2 and reduces the overcurrent and
the way-overcurrent protection levels to 1/3 of the initial
values.
In 1-phase configuration, the ISL62883C does not
change the operational mode when the PSI# signal
changes status. It enters 1-phase DE mode when
DLPRSLPVR = 1.
Dynamic Operation
When the ISL62883C is configured for CPU VR
application, it responds to VID changes by slewing to the
new voltage at 5mV/µs slew rate. As the output
approaches the VID command voltage, the dv/dt
moderates to prevent overshoot. Geyserville-III
transitions commands one LSB VID step (12.5mV) every
2.5µs, controlling the effective dv/dt at 5mv/µs. The
ISL62883C is capable of 5mV/µs slew rate.
When the ISL62883C is configured for GPU VR
application, it responds to VID changes by slewing to the
new voltage at a slew rate set by the logic status on the
DPRSLPVR pin. The slew rate is 5mV/µs when
DPRSLPVR=0 and is doubled when DPRSLPVR = 1.
BIAS
BIAS
= 147kΩ disables the overshoot reduction function
= 47kΩ enables it.
BIAS
BIAS
= 147kΩ puts the
value.
BIAS
March 18, 2010
= 47kΩ
FN7557.1

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