SB16C1058-TQFP128 IK Semicon Co., Ltd, SB16C1058-TQFP128 Datasheet - Page 29
SB16C1058-TQFP128
Manufacturer Part Number
SB16C1058-TQFP128
Description
Octal-uart Controller With 256-byte Fifo
Manufacturer
IK Semicon Co., Ltd
Datasheet
1.SB16C1058-TQFP128.pdf
(66 pages)
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Figure 9:
16X Clock
Break Condition Block Diagram
Transmitter Shift Register(TSR)
6.9 Break and Time-out Conditions
TX FIFO
Character #2
Character #1
Break Condition:
Break Condition is occurred when TXD signal outputs ‘0’ and sustains for more than one
character.
It is occurred if LCR[6] is set to ‘1’ and deleted if ‘0’. If break condition is occurred when
normal data are transmitted on TXD, break signal is transmitted and internal serial data
are also transmitted, but they are not outputted to external TXD pin. When Break
condition is deleted, then they are transmitted to TXD pin.
Figure 9 below shows the Break Condition Block Diagram.
Time-out Condition:
When serial data is received from external UART, characters are stored in RX FIFO.
When the number of characters in RX FIFO reaches the trigger level, interrupt is
generated for the CPU to treat characters in RX FIFO. But when the number of
characters in RX FIFO does not reach the trigger level and no more data arrives from
external device, interrupt is not generated and therefore CPU cannot recognize it.
IN16C1058 offers time-out function for this situation. Time-out function generates an
interrupt and reports to CPU when the number of RX FIFO is less than trigger level and
no more data receives for four character time.
Time-out interrupt is enabled when IER[2] is set to ‘1’ and can be verified by ISR.
OCTAL UART WITH 256-BYTE FIFO
MCR[6] = 0
MCR[6] = 1
MCR[6] = 0
M
S
R
M
S
R
TXD PIN
L
S
R
Brake Condition Output
TSR Output
MCR[6] = 1
M
S
R
IN16C1058
JUNE 2009
MCR[6] = 0
L
S
R
L
S
R
REV 1.0
29
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