SB16C1058-TQFP128 IK Semicon Co., Ltd, SB16C1058-TQFP128 Datasheet - Page 47
SB16C1058-TQFP128
Manufacturer Part Number
SB16C1058-TQFP128
Description
Octal-uart Controller With 256-byte Fifo
Manufacturer
IK Semicon Co., Ltd
Datasheet
1.SB16C1058-TQFP128.pdf
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7.19 Enhanced Feature Register (EFR, Page 3)
EFR enables or disables the enhanced features of the UART. Table 22 shows EFR bit
settings.
Table 22:
Bit
7
6
5
4
3:0
Symbol
EFR[7]
EFR[6]
EFR[5]
EFR[4]
EFR[3:0]
Enhanced Feature Register Description
OCTAL UART WITH 256-BYTE FIFO
Description
Auto-CTS Flow Control Enable.
Auto-RTS Flow Control Enable.
Special Character Detect.
Enhanced Function Bits Enable.
Software Flow Control Select.
0 : Auto-CTS flow control is disabled (default).
1 : Auto-CTS flow control is enabled. Transmission stops when
0 : Auto-RTS flow control is disabled (default).
1 : Auto-RTS flow control is enabled. The NRTS pin outputs
0 : Special character detect disabled (default).
1 : Special character detect enabled. The UART compares each
0 : Disables enhanced functions and writing to IER[7:4],
1 : Enables enhanced function IER[7:4], FCR[5:4], and MCR[7:5]
Single character and dual sequential characters software flow
control is supported. Combinations of software flow control can
be selected by programming these bits. See Table 4 “Software
flow control options (EFR[3:0])” on page 15.
NCTS pin is inputted ‘1’. Transmission resumes when NCTS
pin is inputted ‘0’.
‘1’ when data in RX FIFO fill above the FUR. NRTS pin outputs
‘0’ when data in RX FIFO fall below the FLR.
incoming character with data in Xoff2 register. If a match
occurs, the received data is transferred to RX FIFO and ISR[4]
is set to ‘1’ to indicate that a special character has been
detected.
FCR[5:4], MCR[7:5].
can be modified, i.e., this bit is therefore a write enable.
IN16C1058
JUNE 2009
REV 1.0
47
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