mcf51ag96 Freescale Semiconductor, Inc, mcf51ag96 Datasheet - Page 16

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mcf51ag96

Manufacturer Part Number
mcf51ag96
Description
Coldfire Microcontroller Covers Mcf51ag128 And Mcf51ag96 Mcf51ag128 Coldfire Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Preliminary Electrical Characteristics
The average chip-junction temperature (T
where:
For most applications, P
is:
Solving
where K is a constant pertaining to the particular part. K can be determined from
for a known T
for any value of T
2.4
Although damage from static discharge is much less common on these devices than on early CMOS circuits, normal handling
precautions should be used to avoid exposure to static discharge. Qualification tests are performed to ensure that these devices
can withstand exposure to reasonable levels of static without suffering any permanent damage.
All ESD testing is in conformity with CDF-AEC-Q00 Stress Test Qualification for Automotive Grade Integrated Circuits.
(http://www.aecouncil.com/) This device was qualified to AEC-Q100 Rev E.
A device is considered to have failed if, after exposure to ESD pulses, the device no longer meets the device specification
requirements. Complete dc parametric and functional testing is performed per the applicable device specification at room
temperature followed by hot temperature, unless specified otherwise in the device specification.
16
Equation 1
T
θ
P
P
P
Human Body
JA
A
D
int
I/O
Electrostatic Discharge (ESD) Protection Characteristics
= Ambient temperature, °C
= P
= Package thermal resistance, junction-to-ambient, °C/W
= I
= Power dissipation on input and output pins — user determined
A
Model
1
2
3
4
. Using this value of K, the values of P
int
DD
Junction temperature is a function of die size, on-chip power dissipation, package thermal
resistance, mounting site (board) temperature, ambient temperature, air flow, power dissipation
of other components on the board, and board thermal resistance.
Junction to Ambient Natural Convection
1s — Single layer board, one signal layer
2s2p — Four layer board, 2 signal and 2 power layers
A
+ P
.
× V
and
I/O
DD
I/O
Equation 2
, Watts — chip internal power
<< P
Series Resistance
Storage Capacitance
Number of Pulse per pin
int
and can be neglected. An approximate relationship between P
for K gives:
Table 7. ESD and Latch-up Test Conditions
MCF51AG128 ColdFire Microcontroller, Rev. 5
K = P
J
) in °C can be obtained from:
D
P
Description
T
× (T
D
J
= K ÷ (T
= T
A
D
+ 273°C) + θ
and T
A
+ (P
J
J
+ 273 °C)
can be obtained by solving
D
× θ
JA
JA
)
× (P
D
)
2
Equation 3
Symbol
R1
C
Equation 1
by measuring P
D
and T
Value
1500
100
and
Freescale Semiconductor
3
J
Equation 2
(if P
D
I/O
(at equilibrium)
Unit
pF
Ω
is neglected)
iteratively
Eqn. 1
Eqn. 2
Eqn. 3

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