c15bc1 aptina, c15bc1 Datasheet - Page 6

• Manufacturer Part Number: c15bc1
• Description: Mt9d014 1/4-inch 2mp Cmos Digital Image Sensor
• Manufacturer: aptina

General Description
Functional Overview
Figure 1:
PDF: 0526161444/Source: 6112702771
MT0D014_DS - Rev. J 5/10 EN
Block Diagram
The MT9D014 digital image sensor features DigitalClarity—Aptina’s breakthrough low
noise CMOS imaging technology that achieves near-CCD image quality (based on
signal-to-noise ratio and low-light sensitivity) while maintaining the inherent size, cost,
and integration advantages of CMOS.
When operated in its default mode, the sensor generates a UXGA image at 24.04 frames
per second (fps) when ext_clk_freq_mhz = 16 MHz. An on-chip analog-to-digital
converter (ADC) generates a 10-bit value for each pixel.
The MT9D014 is a progressive-scan sensor that generates a stream of pixel data at a
constant frame rate. It uses an on-chip, phase-locked loop (PLL) to generate all internal
clocks from a single master input clock running between 6 and 27 MHz. The maximum
pixel rate is 80 Mp/s, corresponding to a video timing pixel clock rate of 80 MHz. A block
diagram of the sensor is shown in Figure 1.
The core of the sensor is a 2Mp active-pixel array. The timing and control circuitry
sequences through the rows of the array, resetting and then reading each row in turn. In
the time interval between resetting a row and reading that row, the pixels in the row inte-
grate incident light. The exposure is controlled by varying the time interval between
reset and readout. Once a row has been read, the data from the columns is sequenced
through an analog signal chain (providing offset correction and gain), and then through
an ADC. The output from the ADC is a 10-bit value for each pixel in the array. The ADC
output passes through a digital processing signal chain (which provides further data
corrections and applies digital gain).
The pixel array contains optically active and light-shielded (dark) pixels. The dark pixels
are used to provide data for on-chip offset-correction algorithms (black level control).
The sensor contains a set of control and status registers that can be used to control many
aspects of the sensor behavior including the frame size, exposure, and gain setting.
These registers can be accessed through a two-wire serial interface.
Sensor (APS)
Active-Pixel
Analog Processing
Array
ADC
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MT9D014: 1/4-Inch 2Mp CMOS Digital Image Sensor
Correction
Shading
Control Registers
Timing Control
Scaler
Limiter
Aptina reserves the right to change products or specifications without notice.
FIFO
©2007 Aptina Imaging Corporation. All rights reserved.
General Description
Two-wire
Serial Interface
Signals
Data
Sync
Out
Preliminary