ds42585 Advanced Micro Devices, ds42585 Datasheet - Page 10
ds42585
Manufacturer Part Number
ds42585
Description
Stacked Multi-chip Package Mcp Flash Memory And Sram
Manufacturer
Advanced Micro Devices
Datasheet
1.DS42585.pdf
(58 pages)
- Current page: 10 of 58
- Download datasheet (700Kb)
Operation
(Notes 1, 2)
Read from Flash
Write to Flash
Standby
Output Disable
Flash Hardware
Reset
Sector Protect
(Note 5)
Sector Unprotect
(Note 5)
Temporary Sector
Unprotect
Read from SRAM
Write to SRAM
Legend: L = Logic Low = V
A
Notes:
1. Other operations except for those indicated in this column are inhibited.
2. Do not apply CE#f = V
3. Don’t care or open LB#s or UB#s.
4. If WP#/ACC = V
5. The sector protect and sector unprotect functions may also be implemented via programming equipment. See the “Sector/Sector
6. If WP#/ACC = V
10
IN
If WP#/ACC = V
Block Protection and Unprotection” section.
depends on whether they were last protected or unprotected using the method described in “Sector/Sector Block Protection and
Unprotection”. If WP#/ACC = V
= Address In, D
Table 2. Device Bus Operations—Flash Word Mode, CIOf = V
ACC
IN
IL
IL
V
0.3 V
CE#f CE1#s CE2s OE# WE#
, the two outermost boot sectors remain protected. If WP#/ACC = V
, the boot sectors will be protected. If WP#/ACC = V
CC
= Data In, D
H
H
H
L
L
L
X
L
L
X
(9V), the program time will be reduced by 40%.
IL
, CE1#s = V
IL
, H = Logic High = V
H
X
H
X
H
X
H
X
H
X
H
X
H
X
H
X
L
L
L
HH,
OUT
all sectors will be unprotected.
X
X
X
H
X
X
X
X
X
H
H
= Data Out
L
L
L
L
L
L
L
L
IL
and CE2s = V
H
H
H
H
H
H
L
X
X
X
L
X
P R E L I M I N A R Y
IH
H
X
H
H
H
X
X
H
L
L
L
L
, V
IH
ID
at the same time.
= 8.5–12.5 V, V
SA
SA
SA
X
X
X
X
X
X
X
X
X
L
DS42585
(Note 3)
LB#s
X
X
X
L
X
X
X
X
X
X
X
X
IH
HH
(Note 3)
UB#s
the boot sectors protection will be removed.
= 9.0 ± 0.5 V, X = Don’t Care, SA = Sector Address,
X
X
X
X
X
X
X
X
X
X
X
L
RESET#
IH
V
0.3 V
; SRAM Byte Mode, CIOs = V
V
V
V
CC
H
H
H
H
H
L
IH
ID
ID
ID
, the two outermost boot sector protection
WP#/ACC
(Note 4)
(Note 3)
(Note 6)
(Note 6)
L/H
L/H
L/H
L/H
H
X
X
DQ0–DQ7 DQ8–DQ15
High-Z
High-Z
High-Z
D
D
D
D
D
D
D
OUT
OUT
IN
IN
IN
IN
IN
SS
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
D
D
OUT
X
X
IN
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