s29al016m Meet Spansion Inc., s29al016m Datasheet

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s29al016m

Manufacturer Part Number
s29al016m
Description
16 Megabits 2m X 8-bits / 1m X 16-bits
Manufacturer
Meet Spansion Inc.
Datasheet

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S29AL016M
16 Megabit (2 M x 8-Bit/1 M x 16-Bit)
3.0 Volt-only Boot Sector Flash Memory
Featuring MirrorBit™ Technology
Data Sheet
This product has been retired and is not recommended for designs. For new
and current designs, S29AL016D supersedes S29AL016M and is the factory-
recommended migration path for this device. Please refer to the S29AL016D
Datasheet for specifications and ordering information. Availability of this
document is retained for reference and historical purposes only.
Notice to Readers: This document states the current technical specifications
regarding the Spansion product(s) described herein. Spansion Inc. deems the
products to have been in sufficient production volume such that subsequent
versions of this document are not expected to change. However, typographical
or specification corrections, or modifications to the valid combinations offered
may occur.
Publication Number S29AL016M_00
Revision A
Amendment 7
Issue Date October 11, 2006
PRODUCT
RETIRED

Related parts for s29al016m

s29al016m Summary of contents

Page 1

... Data Sheet This product has been retired and is not recommended for designs. For new and current designs, S29AL016D supersedes S29AL016M and is the factory- recommended migration path for this device. Please refer to the S29AL016D Datasheet for specifications and ordering information. Availability of this document is retained for reference and historical purposes only ...

Page 2

... However, typographical or specification corrections, or modifications to the valid combinations offered may occur.” Questions regarding these document designations may be directed to your local sales office S29AL016M range. Changes IO S29AL016M_00_A7 October 11, 2006 ...

Page 3

... Data Sheet This product has been retired and is not recommended for designs. For new and current designs, S29AL016D supersedes S29AL016M and is the factory-recommended migration path for this device. Please refer to the S29AL016D Datasheet for specifications and ordering information. Availability of this document is retained for reference and historical purposes only. ...

Page 4

... General Description The S29AL016M Mbit, 3.0 Volt-only Flash memory organized as 2,097,152 bytes or 1,048,576 words. The device is offered in a 48-ball Fine-pitch BGA, 64- ball Fortified BGA, and 48-pin TSOP packages. The word-wide data (x16) appears on DQ15–DQ0; the byte-wide (x8) data appears on DQ7–DQ0. The device re- quires only a single 3 ...

Page 5

... Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . 6 Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . 7 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 10 Device Bus Operations . . . . . . . . . . . . . . . . . . . . . . 11 Table 1. S29AL016M Device Bus Operations ......................... 11 Word/Byte Configuration ................................................................................. 11 Requirements for Reading Array Data .......................................................... 11 Writing Commands/Command Sequences ................................................. 12 Program and Erase Operation Status ........................................................... 12 Standby Mode ....................................................................................................... 12 Automatic Sleep Mode .......................................................................................13 RESET#: Hardware Reset Pin ..........................................................................13 Output Disable Mode ...

Page 6

... TSR048—48-Pin Reverse TSOP ....................................................................55 Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . . 56 FBA048—48-Ball Fine-Pitch Ball Grid Array (BGA Package ............................................................................................... LAA064—64-Ball Fortified Ball Grid Array (BGA Package ............................................................................................. 57 Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 58 S29AL016M S29AL016M_00_A7 October 11, 2006 ...

Page 7

... Block Diagram RY/BY RESET# State WE# Control BYTE# Command Register CE# OE# V Detector CC A19–A0 October 11, 2006 S29AL016M_00_A7 2.7–3 Sector Switches Erase Voltage Generator PGM Voltage Generator Chip Enable Output Enable Logic Y-Decoder STB Timer X-Decoder S29AL016M S29AL016M ...

Page 8

... Standard TSOP S29AL016M 48 A16 47 BYTE DQ15/A-1 44 DQ7 43 DQ14 42 DQ6 41 DQ13 40 DQ5 39 DQ12 38 DQ4 DQ11 35 DQ3 34 DQ10 33 DQ2 32 DQ9 31 DQ1 30 DQ8 29 DQ0 S29AL016M_00_A7 October 11, 2006 ...

Page 9

... A6 B6 A13 A12 WE# RESET RY/BY A17 October 11, 2006 S29AL016M_00_A7 Fine-pitch BGA Top View, Balls Facing Down A14 A15 A16 BYTE A10 A11 DQ7 DQ14 ...

Page 10

... A6 A5 DQ0 S29AL016M BYTE# DQ15/A DQ14 DQ13 DQ6 DQ12 V DQ4 DQ10 DQ11 DQ3 DQ8 DQ9 DQ1 CE# OE S29AL016M_00_A7 October 11, 2006 ...

Page 11

... A19–A0 DQ14–DQ0 DQ15/A-1 BYTE# CE# OE# WE# RESET# RY/BY Logic Symbol October 11, 2006 S29AL016M_00_A7 addresses = 15 data inputs/outputs = DQ15 (data input/output, word mode), A-1 (LSB address input, byte mode) = Selects 8-bit or 16-bit mode = Chip enable = Output enable ...

Page 12

... Fortified Ball Grid Array (BGA) SPEED OPTION See Product Selector Guide and Valid Combinations Flash Memory TM Model Number Packing Type 01, R1, 02 (note 1) Valid Combinations S29AL016M C) Package Description TS048 (note 2) TSOP FBA048 (note 3) Fine-pitch BGA LAA064 (note 3) Fortified BGA S29AL016M_00_A7 October 11, 2006 ...

Page 13

... The state machine outputs dictate the function of the device. Table trol levels they require, and the resulting output. The following subsections describe each of these operations in further detail. Table 1. S29AL016M Device Bus Operations Operation CE# OE# WE# RESET# Read ...

Page 14

... Mode” sections for more information. “AC Characteristics” section contains timing specification ta- “Write Operation Status” “AC Characteristics” for timing diagrams. S29AL016M Read Operations in the CC1 for more “Word Program Command and “Autoselect for more in- S29AL016M_00_A7 October 11, 2006 ...

Page 15

... Algorithms). The system can read data t Refer to the AC Characteristics for the timing diagram. Output Disable Mode When the OE# input are placed in the high impedance state. October 11, 2006 S29AL016M_00_A7 but not within for read access when the device is in either CE ...

Page 16

... S29AL016M_00_A7 October 11, 2006 ...

Page 17

... Note: Address range is A19:A-1 in byte mode and A19:A0 in word mode. See the “Word/Byte Configuration” section. Autoselect Mode The autoselect mode provides manufacturer and device identification, and sector protection verification, through identifier codes output on DQ7–DQ0. This mode is primarily intended for programming equipment to automatically match a device October 11, 2006 S29AL016M_00_A7 Sector Size (Kbytes/ ...

Page 18

... ID 2 and 3). Table A5 DQ8 DQ7 DQ15 DQ0 01h 22h C4h C4h 22h 49h 49h X 01h (protected 00h X (unprotected) 83 (factory locked 03h (not factory locked) “Au- S29AL016M_00_A7 October 11, 2006 to ...

Page 19

... RESET# pin, all the previously protected sectors are protected again. shows the algorithm, and Notes: 1. All protected sectors unprotected. 2. All previously protected sectors are protected once again. Figure 1. Temporary Sector Unprotect Operation October 11, 2006 S29AL016M_00_A7 the RESET# pin only, and can ID Figure 23 shows the timing diagram ...

Page 20

... Unprotect: Write 40h to sector address with Read from sector address with Set up next sector No address Data = 00h? Yes No Last sector verified? Yes Remove V ID from RESET# Write reset command Sector Unprotect complete S29AL016M_00_A7 October 11, 2006 ...

Page 21

... Programming and protecting the Secured Silicon Sector must be used with cau- tion since, once protected, there is no procedure available for unprotecting the Secured Silicon Sector area and none of the bits in the Secured Silicon Sector memory space can be modified in any way. October 11, 2006 S29AL016M_00_A7 Customer ...

Page 22

... Write 60h to any address Remove from RESET# Write 40h to SecSi Sector address Write reset with command SecSi Sector Read from SecSi Protect Verify Sector address complete with S29AL016M . This allows in-sys- ID S29AL016M_00_A7 October 11, 2006 ...

Page 23

... October 11, 2006 S29AL016M_00_A7 Table 6. CFI Query Identification String Data 0051h 0052h Query Unique ASCII string “QRY” 0059h 0002h Primary OEM Command Set 0000h 0040h ...

Page 24

... Erase Block Region 4 Information 0000h 0001h S29AL016M Description pin present) PP pin present) PP µs N µs (00h = not supported (00h = not supported) N times typical (00h = not supported) N times typical N times typical (00h = not supported) N Description N S29AL016M_00_A7 October 11, 2006 ...

Page 25

... V greater than V LKO Write Pulse “Glitch” Protection Noise pulses of less than 5 ns (typical) on OE#, CE# or WE# do not initiate a write cycle. October 11, 2006 S29AL016M_00_A7 Data 0050h 0052h Query-unique ASCII string “PRI” ...

Page 26

... Suspend/Erase Resume Commands” in the Read Operations shows the timing diagram. S29AL016M , CE WE “AC Characteristics” section. for more in- “Reset Com- “Device Bus Operations” table provides the read pa- S29AL016M_00_A7 October 11, 2006 ...

Page 27

... Any bit in a word or byte cannot be programmed from “0” back to a “1”. Attempting may halt the operation and set DQ5 to “1,” or cause the Data# Polling algorithm to indicate the operation was successful. However, a suc- October 11, 2006 S29AL016M_00_A7 for information on these status bits ...

Page 28

... Figure 4 illustrates the algorithm for the program operation. See the gram Operations table in for timing diagrams 10–11 show the requirements for the command sequence. “AC Characteristics” for parameters, and to S29AL016M Erase/Pro- Figure 17 S29AL016M_00_A7 October 11, 2006 ...

Page 29

... The system can determine the status of the erase operation by using DQ7, DQ6, DQ2, or RY/BY#. See status bits. When the Embedded Erase algorithm is complete, the device returns to reading array data and addresses are no longer latched. October 11, 2006 S29AL016M_00_A7 START ...

Page 30

... “AC Characteristics” for parameters, and to 10–11 show the address and data section.) The time-out begins from the for information on these status bits.) “AC Characteristics” section for parameters, and to S29AL016M Erase/Program Figure 18 for tim- Erase/Pro- S29AL016M_00_A7 October 11, 2006 ...

Page 31

... The result will be a longer cumulative erase time than without sus- pends. Note that the additional suspends do not affect device reliability or future performance. In most systems rapid erase/suspend activity occurs only briefly. In such cases, erase performance will not be significantly impacted. October 11, 2006 S29AL016M_00_A7 for information on these status bits. ...

Page 32

... The system can determine the status of the program operation using the START Write Erase Command Sequence Data Poll from System Embedded Erase algorithm in progress No Data = FFh? Yes Erasure Completed for erase command sequence. for more information. Figure 5. Erase Operation S29AL016M S29AL016M_00_A7 October 11, 2006 ...

Page 33

... Program Suspend mode and continue the programming opera- tion. Further writes of the Resume command are ignored. Another Program Suspend command can be written after the device has resume programming. No Figure 6. Program Suspend/Program Resume October 11, 2006 S29AL016M_00_A7 Program Operation Sequence in Progress ...

Page 34

... Command is valid when device is ready to read array data or when device is in autoselect mode. S29AL016M ) IH Fourth Fifth Sixth Addr Data Addr Data Addr X00 0001 X01 22C4 X01 2249 X41 (Note 9) (SA)X02 00/01 XXX 555 AA 2AA 55 555 555 AA 2AA 55 SA S29AL016M_00_A7 October 11, 2006 Data 10 30 ...

Page 35

... Data bits DQ15–DQ8 are don’t care. See Command Sequence section or more information. 8. Device ID must be read in three cycles. 9. Data is 00h for an unprotected sector group and 01h for a protected sector group. October 11, 2006 S29AL016M_00_A7 Bus Cycles (Notes 2–5) First Second ...

Page 36

... Figure in the “AC Characteristics” Table 12 shows the outputs for Data# Polling on DQ7. Polling algorithm and the following subsections 19, Data# Polling Timings (During Embedded Algorithms), section illustrates this. Figure 7 S29AL016M shows the Data# S29AL016M_00_A7 October 11, 2006 ...

Page 37

... Algorithm is in progress or complete. The RY/BY# status is valid after the rising edge of the final WE# pulse in the command sequence. Since RY/BY open-drain output, several RY/BY# pins can be tied together in parallel with a pull-up resistor to V October 11, 2006 S29AL016M_00_A7 START Read DQ7–DQ0 ...

Page 38

... Figure 20 in the “AC Characteristics” Figure 21 shows the differences between DQ2 and “DQ2: Toggle Bit to compare outputs for DQ2 and DQ6. S29AL016M 17 and 18 show RY/BY# “DQ7: Data# Polling”). Figure 8 shows the toggle bit ex- section shows the II”. S29AL016M_00_A7 October 11, 2006 ...

Page 39

... Alternatively, it may choose to perform other system tasks. In this case, the system must start at the beginning of the algo- rithm when it returns to determine the status of the operation (top of October 11, 2006 S29AL016M_00_A7 explains the algorithm. See also the shows the toggle bit timing diagram ...

Page 40

... Read DQ7–DQ0 (Note 1) Read DQ7–DQ0 No Toggle Bit = Toggle? Yes No DQ5 = 1? Yes (Notes Read DQ7–DQ0 1, 2) Twice Toggle Bit No = Toggle? Yes Program/Erase Operation Not Program/Erase Complete, Write Operation Complete Reset Command Figure 8. Toggle Bit Algorithm S29AL016M S29AL016M_00_A7 October 11, 2006 ...

Page 41

... DQ5 switches to ‘1’ when an Embedded Program or Embedded Erase operation has exceeded the maximum timing limits. See “DQ5: Exceeded Timing Limits” 2. DQ7 and DQ2 require a valid address when reading status information. Refer to the appropriate subsection for further details. October 11, 2006 S29AL016M_00_A7 section. Table 12. Write Operation Status ...

Page 42

... V. During voltage CC +2.0 V for periods ns –2.0 V for periods Maximum DC input voltage on pin A9 is +12.5 V which +2 +0.5 V 2.0 V Figure 10. Maximum Positive ) . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C A S29AL016M +0 Figure Overshoot Waveform S29AL016M_00_A7 October 11, 2006 ...

Page 43

... At extended temperature range (>+85°C), typical current is 5 µA and maximum current is 10 µA. 5. Automatic sleep mode enables the low power mode when addresses remain stable for t 6. Not 100% tested voltage requirements. CC October 11, 2006 S29AL016M_00_A7 Test Conditions ...

Page 44

... INPUTS Steady Changing from Changing from Does Not Apply Center Line is High Impedance State (High Z) Measurement Level S29AL016M 90, 100 Unit 1 TTL gate OUTPUTS Changing, State Unknown 0.5 V Output CC S29AL016M_00_A7 October 11, 2006 ...

Page 45

... OE#, Whichever Occurs First (Note 1) Notes: 1. Not 100% tested. 2. See Figure 11 and Table 13 for test specifications. Addresses CE# OE# WE# Outputs RESET# RY/BY October 11, 2006 S29AL016M_00_A7 Test Setup Read Toggle and Data# Polling t RC Addresses Stable t ACC t ...

Page 46

... Ready Reset Timings NOT during Embedded Algorithms Reset Timings during Embedded Algorithms t Ready t RP Figure 14. RESET# Timings S29AL016M Test Setup All Speed Options Max 20 Max 500 Min 500 Min 50 Min 20 Min S29AL016M_00_A7 October 11, 2006 Unit µ µs ns ...

Page 47

... If the suspend command was issued after t , status data is available immediately after programming has resumed. See Figure 15. POLL October 11, 2006 S29AL016M_00_A7 section for more information. , the device requires t ...

Page 48

... POLL WPH A0h t BUSY is the true data at the program address. OUT Figure 15. Program Operation Timings S29AL016M Read Status Data (last two cycles WHWH1 Status D OUT t RB S29AL016M_00_A7 October 11, 2006 ...

Page 49

... V CC Notes sector address (for Sector Erase Valid Address for reading status data (see “Write Operation Status”). 2. Illustration shows device in word mode. Figure 16. Chip/Sector Erase Operation Timings October 11, 2006 S29AL016M_00_A7 555h for chip erase ...

Page 50

... Figure 17. Data# Polling Timings (During Embedded Algorithms Valid Status Valid Status (first read) (second read) Figure 18. Toggle Bit Timings (During Embedded Algorithms) S29AL016M VA High Z Valid Data True High Z True Valid Data VA VA Valid Status Valid Data (stops toggling) S29AL016M_00_A7 October 11, 2006 ...

Page 51

... Unprotect Note: Not 100% tested RESET VIDR CE# WE# RY/BY# Figure 20. Temporary Sector Unprotect/Timing Diagram October 11, 2006 S29AL016M_00_A7 Enter Erase Suspend Program Erase Erase Suspend Suspend Read Program Figure 19. DQ2 vs. DQ6 for Erase and Erase Suspend Operations ...

Page 52

... Note: For sector protect For sector unprotect Figure 21. Sector Protect/Unprotect Timing Diagram Valid* Valid* 60h Sector Protect: 150 µs Sector Unprotect S29AL016M Valid* Verify 40h Status S29AL016M_00_A7 October 11, 2006 ...

Page 53

... If the suspend command was issued after t , status data is available immediately after programming has resumed. See Figure 22. POLL October 11, 2006 S29AL016M_00_A7 section for more information. , the device requires t ...

Page 54

... SA for sector erase 555 for chip erase Data# Polling POLL t GHEL t t WHWH1 CPH t BUSY for program PD for program 55 for erase 30 for sector erase 10 for chip erase S29AL016M PA DQ7#, D OUT DQ15 = data written to OUT S29AL016M_00_A7 October 11, 2006 ...

Page 55

... Parameter Description C Input Capacitance IN C Output Capacitance OUT C Control Pin Capacitance IN2 Notes: 1. Sampled, not 100% tested. 2. Test conditions T = 25° 1.0 MHz. A October 11, 2006 S29AL016M_00_A7 Typ (Note 1) Max (Note 2) 0.7 7 ° 2.7 V, 100,000 cycles. ...

Page 56

... Physical Dimensions TS 048—48-Pin Standard TSOP Note: BSC is an ANSI standard for Basic Space Centering Dwg rev AA; 10/99 S29AL016M S29AL016M_00_A7 October 11, 2006 ...

Page 57

... Physical Dimensions TSR048—48-Pin Reverse TSOP Note: BSC is an ANSI standard for Basic Space Centering. October 11, 2006 S29AL016M_00_A7 S29AL016M Dwg rev AA; 10/99 55 ...

Page 58

... Physical Dimensions FBA048—48-Ball Fine-Pitch Ball Grid Array (BGA Package Note: BSC is an ANSI standard for Basic Space Centering S29AL016M Dwg rev AF; 10/99 S29AL016M_00_A7 October 11, 2006 ...

Page 59

... Physical Dimensions LAA064—64-Ball Fortified Ball Grid Array (BGA Package Note: BSC is an ANSI standard for Basic Space Centering. October 11, 2006 S29AL016M_00_A7 S29AL016M 57 ...

Page 60

... Min. BUSY Alternate CE# Controlled Erase/Program Operations Added t parameter to table. RH Connection Diagrams Deleted the Reverse TSOP diagram and t were tightened to 20 ns. EHQZ GHQZ in note. CC and the Min for V IL IH. CC5. S29AL016M S29AL016M_00_A7 October 11, 2006 ...

Page 61

... Copyright © 2004-2006 Spansion Inc. All rights reserved. Spansion, the Spansion logo, MirrorBit, ORNAND, HD-SIM, and combinations thereof, are trade- marks of Spansion Inc. Other company and product names used in this publication are for identification purposes only and may be trademarks of their re- spective companies. October 11, 2006 S29AL016M_00_A7 ...

Page 62

... S29AL016M S29AL016M_00_A7 October 11, 2006 ...

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