s29al016m Meet Spansion Inc., s29al016m Datasheet - Page 29

• Manufacturer Part Number: s29al016m
• Description: 16 Megabits 2m X 8-bits / 1m X 16-bits
• Manufacturer: Meet Spansion Inc.

October 11, 2006 S29AL016M_00_A7
Chip Erase Command Sequence
Notes: See Tables 10 and 11 for program command sequence.
Chip erase is a six bus cycle operation. The chip erase command sequence is ini-
tiated by writing two unlock cycles, followed by a set-up command. Two
additional unlock write cycles are then followed by the chip erase command,
which in turn invokes the Embedded Erase algorithm. The device does not require
the system to preprogram prior to erase. The Embedded Erase algorithm auto-
matically preprograms and verifies the entire memory for an all zero data pattern
prior to electrical erase. The system is not required to provide any controls or tim-
ings during these operations. Tables
requirements for the chip erase command sequence. Note that the Secured Sil-
icon Sector, autoselect, and CFI functions are unavailable when an erase
operation is in progress.
Any commands written to the chip during the Embedded Erase algorithm are ig-
nored. Note that a hardware reset during the chip erase operation immediately
terminates the operation. The Chip Erase command sequence should be reiniti-
ated once the device has returned to reading array data, to ensure data integrity.
The system can determine the status of the erase operation by using DQ7, DQ6,
DQ2, or RY/BY#. See
status bits. When the Embedded Erase algorithm is complete, the device returns
to reading array data and addresses are no longer latched.
Increment Address
D a t a
“Autoselect Command Sequence”
Figure 4. Program Operation
in progress
Embedded
S h e e t
algorithm
Program
S29AL016M
No
10–11
Command Sequence
Write Program
Last Address?
Programming
from System
Verify Data?
Completed
Data Poll
START
show the address and data
Yes
Yes
for information on these
No
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