sam3s16 ATMEL Corporation, sam3s16 Datasheet - Page 28

• Manufacturer Part Number: sam3s16
• Description: At91sam Arm-based Flash Mcu
• Manufacturer: ATMEL Corporation

9.1.3.11
9.1.3.12
9.1.4
9.2
9.2.1
28
External Memories
SAM3S16 Preliminary
Boot Strategies
Static Memory Controller
SAM-BA
GPNVM Bits
®
Boot
The FFPI supports read, page program, page erase, full erase, lock, unlock and protect
commands.
The Fast Flash Programming Interface is enabled and the Fast Programming Mode is entered
when TST and PA0 and PA1 are tied low.
The SAM-BA Boot is a default Boot Program which provides an easy way to program in-situ the
on-chip Flash memory.
The SAM-BA Boot Assistant supports serial communication via the UART0 and USB.
The SAM-BA Boot provides an interface with SAM-BA Graphic User Interface (GUI).
The SAM3S16 features two GPNVM bits that can be cleared or set respectively through the
commands “Clear GPNVM Bit” and “Set GPNVM Bit” of the EEFC User Interface.
Table 9-2.
The system always boots at address 0x0. To ensure maximum boot possibilities, the memory
layout can be changed via GPNVM.
A general-purpose NVM (GPNVM) bit is used to boot either on the ROM (default) or from the
Flash.
The GPNVM bit can be cleared or set respectively through the commands “Clear General-pur-
pose NVM Bit” and “Set General-purpose NVM Bit” of the EEFC User Interface.
Setting GPNVM Bit 1 selects the boot from the Flash, clearing it selects the boot from the ROM.
Asserting ERASE clears the GPNVM Bit 1 and thus selects the boot from the ROM by default.
The SAM3S16 features an External Bus Interface to provide the interface to a wide range of
external memories and to any parallel peripheral.
• 8-bit Data Bus
• Up to 24-bit Address Bus (up to 16 MBytes linear per chip select)
• Up to 4 chip selects, Configurable Assignment
• Multiple Access Modes supported
• Multiple device adaptability
• Multiple Wait State Management
GPNVMBit[#]
– Chip Select, Write enable or Read enable Control Mode
– Asynchronous read in Page Mode supported (4- up to 32-byte page size)
– Control signals programmable setup, pulse and hold time for each Memory Bank
0
1
General Purpose Non-volatile Memory Bits
Function
Security bit
Boot mode selection
11117AS–ATARM–12-Jul-11