mma2602wr2 Freescale Semiconductor, Inc, mma2602wr2 Datasheet

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mma2602wr2

Manufacturer Part Number
mma2602wr2
Description
Dsi Inertial Sensor
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Freescale Semiconductor
Technical Data
© Freescale Semiconductor, Inc., 2010. All rights reserved.
DSI Inertial Sensor
The MMA26xxWR2 family of devices are DSI2.5 compatible overdamped X-axis
satellite accelerometers.
Features
• ±25g to ±312.5g Nominal Full-Scale Range
• Selectable 180 Hz, 2-pole, 400Hz, 4-pole, or 800Hz, 4-pole LPF
• DSI2.5 Compatible with full support of Mandatory Commands
• Internal High Side Bus Switch for DSI2.5 Daisy Chain Applications
• 16μs internal sample rate, with interpolation to 1ms
• -40°C to 125°C Operating Temperature Range
• Pb-Free 16-Pin QFN-6x6 Package
• Qualified AEC-Q100, Revision G, Grade 1 (-40°C to +125°C)
Typical Applications
• Airbag Front and Side Crash Detection
MMA2602WR2
MMA2605WR2
MMA2606WR2
MMA2612WR2
MMA2618WR2
MMA2631WR2
Device
Axis
X
X
X
X
X
X
ORDERING INFORMATION
Range
62.5g
125g
187g
312g
25g
50g
Package
2086-01
2086-01
2086-01
2086-01
2086-01
2086-01
Tape & Reel
Tape & Reel
Tape & Reel
Tape & Reel
Tape & Reel
Tape & Reel
Shipping
BUSRTN
TEST2
TEST3
TEST1
MMA26xxWR2
DSI INERTIAL SENSOR
PIN CONNECTIONS
1
2
3
4
Bottom View
CASE 2086-01
16 15 14 13
5
16-PIN QFN
17
Top View
6
7
Rev 1, 10/2010
MMA26xxWR2
8
12
11
10
9
V
C
TEST4
C
SSA
REGA
REG

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mma2602wr2 Summary of contents

Page 1

... Operating Temperature Range • Pb-Free 16-Pin QFN-6x6 Package • Qualified AEC-Q100, Revision G, Grade 1 (-40°C to +125°C) Typical Applications • Airbag Front and Side Crash Detection ORDERING INFORMATION Device Axis Range MMA2602WR2 X 25g MMA2605WR2 X 50g MMA2606WR2 X 62.5g MMA2612WR2 ...

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Application Diagram C4 Ref Des Type C1 Ceramic C2 Ceramic C3 Ceramic, Tantalum C4 Ceramic C5 Ceramic Device Orientation xxxxxxx xxxxxxx MMA26xxWR 2 TEST2 BUSIN V CC TEST1 TEST3 MMA26xx TEST4 BUSRTN V TEST5 ...

Page 3

Internal Block Diagram BUSIN V V BUSOUT BUSRTN SERIAL ENCODER V SS OSCILLATOR V REG SELF-TEST INTERFACE V V REGA REG ΣΔ CONVERTER Sensors Freescale Semiconductor HCAP DIGITAL VOLTAGE REGULATOR ANALOG VOLTAGE REGULATOR DSI_REF REFERENCE VOLTAGE DSI_REF CONTROL LOGIC OTP ...

Page 4

Pin Connections BUSRTN Table 1. Pin Description Pin Pin Formal Name Name 1 TEST2 Test Pin This pin must be left unconnected in the application. 2 TEST3 Test Pin This pin must be grounded in the application. 3 TEST1 ...

Page 5

Electrical Characteristics 2.1 Maximum Ratings Maximum ratings are the extreme limits to which the device can be exposed without permanently damaging it. Do not apply voltages higher than those shown in the table below. # Rating 1 Supply Voltage ...

Page 6

Electrical Characteristics - Supply and I/O ≤ ≤ V ≤ T ≤ Characteristic 21 Quiescent Supply Current Inrush Current (excluding HCAP Capacitor charge ...

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Electrical Characteristics - Signal Chain ≤ ≤ V ≤ T ≤ Characteristic Sensitivity (10-bit @ 100Hz referenced to 0Hz) 54 25g Range 55 ...

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Electrical Characteristics - Self Test and Overload ≤ ≤ V ≤ T ≤ Characteristic Acceleration (without hitting internal g-cell stops) 71 ±25g, ±50g, ...

Page 9

Dynamic Electrical Characteristics - DSI ≤ ≤ V ≤ T ≤ Characteristic Reset Recovery (See Figure 20) 87 POR negated to 1st DSI Command ...

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Dynamic Electrical Characteristics - Signal Chain ≤ ≤ V ≤ T ≤ Characteristic 120 Internal Oscillator Frequency 121 Data Interpolation Latency DSP Low-Pass ...

Page 11

V PORHCAP_r V PORHCAP_f V V HYST_HCAP HCAP POR V REG V PORVREG_r V PORVREG_f V HYST_VREG POR V REGA V PORVREGA_r V PORVREGA_f V HYST_VREGA POR Sensors Freescale Semiconductor UV Figure 5. V Under Voltage Detection HCAP t Figure ...

Page 12

V THF V THS BUSIN’ t IFS_master t IFS_slave EOF slave 9mA 1mA I RESPONSE DSP_OUT MMA26xxWR 12 t START_master LOGIC ‘1’ t START_slave t ITR t RSP_R t LAT_DSI t LAT_INTERP Figure 8. DSI Bus Inter-frame Timing LOGIC ‘0’ ...

Page 13

Functional Description 3.1 User Accessible Data Array A user accessible data array allows for each device to be customized. The array consists of an OTP factory programmable array, an OTP user programmable array, and read only registers for device ...

Page 14

Device Type Register (TYPE) The Device Type Register is an OTP configuration register which contains device configuration information. Bit 5 - Bit 0 are factory programmed and are included in the factory programmed OTP CRC verification. These bits are ...

Page 15

Device Configuration Register (DEVCFG) The Device configuration register is a user programmable OTP register which contains device configuration information. This register is included in the user register CRC check. Refer to ble OTP array. Table 4. Device Control Register ...

Page 16

Device Configuration 2 Register (DEVCFG2) Device configuration register user programmable OTP register which contains device configuration information. This register is included in the user register CRC check. Refer to ble OTP array. Table 6. Device Control ...

Page 17

OTP Array Lock and CRC Verification 3.2.1 Factory Programmed OTP Array Lock and CRC Verification The Factory programmed OTP array is verified for errors with a 3-bit CRC. The CRC verification is enabled only when the Factory programmed OTP ...

Page 18

VOLTAGE REGULATORS The device derives its internal supply voltage from the HCAP supply voltage. The device includes separate internal voltage regulators for the analog (V ) and digital circuitry (V REGA The voltage regulator module includes voltage monitoring circuitry ...

Page 19

V , and V Undervoltage Monitor REG REGA The device includes a circuit to monitor the internally regulated voltages (V voltages fall below the specified thresholds specified in Section 2.7. VREGA_POR 3.3.4 V and V Capacitance ...

Page 20

Acceleration Signal Path 3.5.1 Transducer The device transducer is an overdamped mass-spring-damper system described by the following transfer function: where: ζ = Damping Ratio ω = Natural Frequency = 2∗Π∗ Reference Section 2.8 for transducer parameters. ΣΔ ...

Page 21

Decimation Sinc Filter The serial data stream produced by the ΣΔ converters is decimated and converted to parallel values by a 3rd order 16:1 sinc filter with a decimation factor of 16. Sensors Freescale Semiconductor ...

Page 22

Low Pass Filter Data from the Sinc filter is processed by an infinite impulse response (IIR) low pass filter ⋅ ⋅ -------------------------------------------------------------------------------------------- = ...

Page 23

Figure 15. Low-Pass Filter Characteristics: f Sensors Freescale Semiconductor = 16 μs = 180 Hz, 2-Pole MMA26xxWR 23 ...

Page 24

Figure 16. Low-Pass Filter Characteristics: f MMA26xxWR μs = 400 Hz, 4-Pole Freescale Semiconductor Sensors ...

Page 25

Figure 17. Low-Pass Filter Characteristics: f Sensors Freescale Semiconductor = 16 μs = 800 Hz, 4-Pole MMA26xxWR 25 ...

Page 26

Compensation The device includes internal compensation circuitry to compensate for sensor offset, sensitivity and non-linearity. 3.5.3.4 Data Interpolation The device includes linear data interpolation to minimize the system sample jitter. Each result produced by the digital ...

Page 27

Device Initialization Following power-up, under-voltage reset or reception of a DSI Clear Command, the device proceeds through an initialization process as described in the following tables: Table 9. Power-up or Under-Voltage Reset Initialization Process # Description 1 Power up ...

Page 28

Overload Response 3.7.1 Overload Performance The device is designed to operate within a specified range. however, acceleration beyond that range (overload) impacts the operating range output of the sensor. Acceleration beyond the range of the device can generate a ...

Page 29

DSI Protocol layer 4.1 Communication Interface Overview The device is compatible with the DSI Bus Standard V2.5. 4.1.1 DSI Physical Layer Reference DSI Bus Standard V2.5, Section 3 for information regarding the physical layer. 4.1.2 DSI Data Link Layer ...

Page 30

Initialization Command The initialization command conforms to the description provided in Section 6.1.1 of the DSI Bus Standard V2.5. The initializa- tion command is only supported as a standard long command. No other commands are recognized by the device ...

Page 31

Table 15. Initialization Response Bit Definitions Bit Field DSI device address. This field contains the device address. If the device is unprogrammed when the initialization command is issued, the PA[3:0] device address is assigned. This field contains the programmed address. ...

Page 32

Request Status Command The Request Status command is supported in the following command formats: • Standard Long Command • Standard Short Command • Enhanced Long Command as configured by the Format Control Command (Reference • Enhanced Short Command as ...

Page 33

Read Acceleration Data Command The Read Acceleration Data command is supported in the following command formats: • Standard Long Command • Standard Short Command • Enhanced Long Command as configured by the Format Control Command (Reference • Enhanced Short ...

Page 34

Table 26. Acceleration Data Values 8-Bit Data Value 9-Bit Data Value Decimal Hex Decimal 255 0xFF 511 • • • • • • • • • 131 0x83 259 130 0x82 258 129 0x81 257 128 0x80 256 127 0x7F ...

Page 35

Request ID Information Command The Request ID Information command is supported in the following command formats: • Standard Long Command • Standard Short Command • Enhanced Long Command as configured by the Format Control Command (Reference • Enhanced Short ...

Page 36

Clear Command The Clear command is supported in the following command formats: • Standard Long Command • Standard Short Command • Enhanced Long Command as configured by the Format Control Command (Reference • Enhanced Short Command as configured by ...

Page 37

Write NVM Command The Write NVM command is supported in the following command formats: • Standard Long Command • Enhanced Long Command as configured by the Format Control Command (Reference The device ignores the Write NVM command if the ...

Page 38

Table 39. OTP Register Nibble Address Assignments Bank Address Register Address (Nibble) Bnk[1] Bnk[0] WA[3] WA[2] WA[1] WA[ ...

Page 39

Format Control Command The Format Control command is supported in the following command formats: • Standard Long Command • Enhanced Long Command as configured by the Format Control Command (Reference The device ignores the Format Control command if the ...

Page 40

Format Control registers will become active upon completion of the write. In this case, the response to a Format Control Com- mand will maintain the format of the previous command resulting in an invalid response. A write of ‘0000’ to ...

Page 41

Disable Self-Test Command The Disable Self Test command is supported in the following command formats: • Standard Long Command • Standard Short Command • Enhanced Long Command as configured by the Format Control Command (Reference • Enhanced Short Command ...

Page 42

Enable Self-Test Command The Enable Self Test command is supported in the following command formats: • Standard Long Command • Standard Short Command • Enhanced Long Command as configured by the Format Control Command (Reference • Enhanced Short Command ...

Page 43

DSI Command #14 DSI Command ‘1110’ is not implemented. The device ignores all command formats with a command ID of ‘1110’. 4.2.1.16 Reverse Initialization Command The Reverse Initialization Command is not implemented. The device ignores all command formats with ...

Page 44

Recommended Footprint Reference Freescale Application Note AN3111, latest revision: http://www.freescale.com/files/sensors/doc/app_note/AN3111.pdf MMA26xxWR 44 Sensors Freescale Semiconductor ...

Page 45

Sensors Freescale Semiconductor PACKAGE DIMENSIONS CASE 2086-01 ISSUE B 16 LEAD QFN PAGE MMA26xxWR 45 ...

Page 46

MMA26xxWR 46 PACKAGE DIMENSIONS CASE 2086-01 ISSUE B 16 LEAD QFN PAGE Sensors Freescale Semiconductor ...

Page 47

Sensors Freescale Semiconductor PACKAGE DIMENSIONS CASE 2086-01 ISSUE B 16 LEAD QFN PAGE MMA26xxWR 47 ...

Page 48

... Freescale Semiconductor was negligent regarding the design or manufacture of the part. Freescale and the Freescale logo are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. Xtrinsic is a trademark of FreescaleSemiconductor, Inc. All other product or service names are the property of their respective owners. ...

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