ics83940ay-02 Integrated Device Technology, ics83940ay-02 Datasheet - Page 10
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ics83940ay-02
Manufacturer Part Number
ics83940ay-02
Description
Differential/lvcmos-input Lvcmos-output 1 18 200-mhz Clock Buffer
Manufacturer
Integrated Device Technology
Datasheet
1.ICS83940AY-02.pdf
(14 pages)
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Part Number:
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Manufacturer:
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A
Figure 3 shows an example of ICS83940-02 application sche-
matic. In this example, the device is operated at V
decoupling capacitor should be located as close as possible to
the power pin. The differential input can accept different type of
83940AY-02
PPLICATION
(U1-8)
VCC
3.3V LVPECL
VDDO
C1
0.1u
VCC
S
LVCMOS
Zo = 50 Ohm
Zo = 50 Ohm
CHEMATIC
Q3
(U1-16)
C8 (Option)
C2
0.1u
R3
0.1u
R4
50
(U1-21)
E
43
XAMPLE
C3
0.1u
Zo = 50 Ohm
R5
50
R6
50
(U1-29)
F
IGURE
www.icst.com/products/hiperclocks.html
C4
0.1u
3. A
CC
VDD
=3.3V. The
D
VDDO
VDD=3.3V
VDDO=3.3V
C5
0.1u
PPLICATION SCHEMATIC EXAMPLE
IFFERENTIAL
ICS83940-02
1
2
3
4
5
6
7
8
U1
10
GND
GND
LVCMOS_CLK
CLK_SEL
CLK
nCLK
VDD
VDDO
input signals. In this example, this input is driven by a 3.3V
LVPECL driver. For the LVCMOS output, a termination example
is shown in this schematic. For more termination approaches,
please refer to the LVCMOS Termination Application Note.
-
TO
-LVCMOS/LVTTL F
VDDO
GND
Q10
Q11
Q6
Q7
Q8
Q9
24
23
22
21
20
19
18
17
R1
R2
L
ICS83940-02
43
43
OW
S
Zo = 50
Zo = 50
ANOUT
KEW
REV. A JULY 30, 2007
, 1-
B
TO
UFFER
-18