ics83940ay-02 Integrated Device Technology, ics83940ay-02 Datasheet - Page 8
![no-image](/images/no-image-200.jpg)
ics83940ay-02
Manufacturer Part Number
ics83940ay-02
Description
Differential/lvcmos-input Lvcmos-output 1 18 200-mhz Clock Buffer
Manufacturer
Integrated Device Technology
Datasheet
1.ICS83940AY-02.pdf
(14 pages)
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ics83940ay-02LF
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Company:
Part Number:
ics83940ay-02LFT
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
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W
Figure 1 shows how the differential input can be wired to accept
single ended levels. The reference voltage V_REF = V
generated by the bias resistors R1, R2 and C1. This bias circuit
should be located as close as possible to the input pin. The ratio
83940AY-02
IRING THE
D
IFFERENTIAL
I
F
NPUT TO
IGURE
Single Ended Clock Input
1. S
A
A
www.icst.com/products/hiperclocks.html
PPLICATION
INGLE
CCEPT
E
C1
0.1u
D
S
NDED
V_REF
INGLE
IFFERENTIAL
CC
/2 is
S
IGNAL
E
8
I
NDED
of R1 and R2 might need to be adjusted to position the V_REF in
the center of the input voltage swing. For example, if the input
clock swing is only 2.5V and V
and R2/R1 = 0.609.
NFORMATION
D
1K
R1
1K
R2
RIVING
VDD
L
-
TO
EVELS
CLK
nCLK
D
-LVCMOS/LVTTL F
IFFERENTIAL
I
NPUT
CC
= 3.3V, V_REF should be 1.25V
L
ICS83940-02
OW
S
ANOUT
KEW
REV. A JULY 30, 2007
, 1-
B
TO
UFFER
-18