ics9lprs535 Integrated Device Technology, ics9lprs535 Datasheet - Page 12

• Manufacturer Part Number: ics9lprs535
• Description: Integrated Circuit Systems, Inc.
• Manufacturer: Integrated Device Technology

1461A—07/28/09
Byte 4 Output Enable and Spread Spectrum Disable Register
Byte 5 Clock Request Enable/Configuration Register
Byte 6 Clock Request Enable/Configuration and Stop Control Register
Byte 7 Vendor ID/ Revision ID
Bit
Bit
Bit
Bit
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
Pin
Pin
Pin
Pin
Integrated
Circuit
Systems, Inc.
SRC0/DOT96_OE
SATA/SRC2_OE
SRC_STP_CRTL
PLL1_SSC_ON
Rev Code Bit 3
Rev Code Bit 2
Rev Code Bit 1
Rev Code Bit 0
Vendor ID bit 3
Vendor ID bit 2
Vendor ID bit 1
Vendor ID bit 0
CR#_A_SEL
CR#_C_SEL
CR#_D_SEL
CR#_A_EN
CR#_C_EN
CR#_D_EN
CR#_F_EN
SRC3_OE
CPU1_OE
CPU0_OE
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Name
Name
Name
Name
If set, SRCs (except SRC1) stop with PCI_STOP#
PCI0_OE must be = 1 for this bit to take effect
Sets CR#_A to control either SRC0 or SRC2
Enable PLL1's spread modulation
Enable CR#_F (clk req) -> SRC8
Output enable for SRC0/DOT96
Sets CR#_C -> SRC0 or SRC2
Sets CR#_D -> SRC1 or SRC4
Output enable for SATA/SRC2
Enable CR#_A (clk req),
Output enable for SRC3
Output enable for CPU1
Output enable for CPU0
Enable CR#_C (clk req)
Enable CR#_D (clk req)
ICS is 0001, binary
Rev B = 0001
Rev C = 0010
Description
Description
Description
Description
Revision ID
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Vendor ID
12
Type
Type
Type
Type
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
R
R
R
R
R
R
R
R
Spread Disabled
CR#_A -> SRC0
CR#_C -> SRC0
Output Disabled
Output Disabled
Output Disabled
Output Disabled
Output Disabled
Disable CR#_A
Disable CR#_C
Disable CR#_D
Disable CR#_F
NA, SRC1 not
Free Running
present
0
0
0
0
B rev = 0001
C rev = 0010
ICS is 0001
ICS9LPRS535
CR#_A -> SRC2
CR#_C -> SRC2
CR#_D -> SRC4
Spread Enabled
Output Enabled
Output Enabled
Output Enabled
Output Enabled
Output Enabled
Enable CR#_A
Enable CR#_C
Enable CR#_D
Enable CR#_F
PCI_STOP#
Stops with
assertion
1
1
1
1
Datasheet
Default
Default
Default
Default
X
X
X
X
1
1
0
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1