ics9lprs535 Integrated Device Technology, ics9lprs535 Datasheet - Page 5

• Manufacturer Part Number: ics9lprs535
• Description: Integrated Circuit Systems, Inc.
• Manufacturer: Integrated Device Technology

1461A—07/28/09
1
2
3
1
2
3
4
5
6
7
8
9
induced modulation by setting C_cross_delta to be smaller than V_Cross absolute
10
meets Clock# falling. The median cross point is used to calculate the voltage
11
Absolute Maximum Ratings - DC Parameters
AC Electrical Characteristics - Low Power Differential Outputs
NOTES on DIF Output AC Specs: (unless otherwise noted, guaranteed by design and characterization, not 100% tested in production).
Electrical Characteristics - PCICLK/PCICLK_F
Guaranteed by design and characterization, not 100% tested in production.
Measurement taken for single ended waveform on a component test board (not in system)
Operation under these conditions is neither implied, nor guaranteed.
Maximum input voltage is not to exceed VDD
Measurement taken from differential waveform on a component test board. (not in system)
Slew rate emastured through V_swing voltage range centered about differential zero
Vcross is defined at the voltage where Clock = Clock#, measured on a component test board (not in system)
Only applies to the differential rising edge (Clock rising, Clock# falling)
Total distributed intentional SRC to SRC skew. PCIE Gen2 outputs (SRC3, 4, 6 and 7) will have 0 nominal skew. Maximum allowable interpair skew is 150 ps.
The max voltage including overshoot.
The min voltage including undershoot.
The total variation of all Vcross measurements in any particular system. Note this is a subset of V_cross min/mas (V_Cross absolute) allowed. The intent is to limit Vcross
Matching applies to rising edge rate for Clock and falling edge rate for Clock#. It is measured using a +/-75mV window centered on the average cross point where Clock rising
For PCIe Gen2 compliant devices, SRC 3, 4, 6, and 7 will have 0 ps nominal skew.
Maximum Supply Voltage
Maximum Supply Voltage
Differential Voltage Swing
Maximum Output Voltage
Intential PCI to PCI delay
Minimum Output Voltage
Absolute min/max period
Crossing Point Variation
Maximum Input Voltage
Falling Edge Slew Rate
Falling Edge Slew Rate
Minimum Input Voltage
Rising Edge Slew Rate
Crossing Point Voltage
Rising Edge Slew Rate
Storage Temperature
Input ESD protection
Jitter, Cycle to cycle
CPU[2_ITP:0] Skew
Output High Voltage
Output High Current
Slew Rate Variation
Output Low Voltage
Output Low Current
SRC[10:0] Skew
Integrated
Circuit
Systems, Inc.
Pin to Pin Skew
CPU[1:0] Skew
Long Accuracy
PARAMETER
PARAMETER
PARAMETER
Clock period
Duty Cycle
Duty Cycle
CPUSKEW10
CPUSKEW20
VXABSVAR
VDDxxx_IO
SRCSKEW
SYMBOL
SYMBOL
SYMBOL
ESD prot
VSWING
VDDxxx
tSLVAR
VXABS
VHIGH
VLOW
t
DCYC
T
jcyc-cyc
tSLR
tFLR
ppm
t
t
T
V
V
t
t
V
V
period
I
I
skew
skew
Ts
d
SLR
FLR
abs
OH
OL
OH
OL
IH
t1
IL
Low-Voltage Differential I/O Supply
33.33MHz output nominal/spread
see Tperiod min-max values
33.33MHz output no spread
33.33MHz output no spread
Measured from 0.8 to 2.0 V
Measured from 2.0 to 0.8 V
Differential Measurement
Differential Measurement
Differential Measurement
33.33MHz output spread
V
V
V
Human Body Model
V
OH
OL
OL
5
OH
Supply Voltage
CONDITIONS
CONDITIONS
@MAX = 3.135 V
CONDITIONS
Averaging off
Averaging off
Averaging off
Averaging off
Averaging off
Averaging on
Averaging on
Averaging on
Averaging on
@ MIN = 1.95 V
3.3V Inputs
I
@ MAX = 0.4 V
I
OH
V
V
V
V
Any Input
@MIN = 1.0 V
OL
T
T
T
T
= -1 mA
= 1.5 V
= 1.5 V
= 1.5 V
= 1.5 V
= 1 mA
-
GND - 0.5
29.99700
30.08421
29.49700
29.56617
2000
MIN
MIN
-300
-100
MIN
300
300
100
-65
2.5
2.5
-33
2.4
45
30
45
1
1
ICS9LPRS535
30.00300
30.23459
30.50300
30.58421
MAX
MAX
1150
3000
MAX
0.55
150
550
140
100
150
100
250
200
500
4.6
3.8
4.6
-33
20
55
38
55
4
4
4
4
Datasheet
UNITS Notes
UNITS NOTES
UNITS NOTES
V/ns
V/ns
V/ns
V/ns
ppm
mV
mV
mV
mV
mV
mA
mA
mA
mA
ps
ps
ps
°
%
%
ns
ns
ns
ns
ps
ps
ps
%
V
V
V
V
V
V
V
C
1,6,11
4,5,7
1, 10
1,4,5
1,4,9
2, 3
2, 3
1,2
4,7
4,7
6,7
1,7
1,8
7
7
2
2
1
1
2
2
2
2
1
1
1
1
1
1
1
1
2
2
2
2