vsc8150 Vitesse Semiconductor Corp, vsc8150 Datasheet

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vsc8150

Manufacturer Part Number
vsc8150
Description
2.488gb/s Sonet/sdh Overhead Monitor
Manufacturer
Vitesse Semiconductor Corp
Datasheet

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Part Number:
vsc8150QQ
Manufacturer:
VITESSE
Quantity:
5 510
Part Number:
vsc8150QQ
Manufacturer:
EUPEC
Quantity:
5 510
VSC8150
10/12/98
Preliminary Data Sheet
G52186-0, Rev. 3.0
Features
General Description
Administration, Maintenance, and Provisioning (OAM&P) at multiple SONET/SDH rates. Differential PECL
clock and data input receivers and a differential data output isolate the high-speed interface. Low-speed TTL
inputs and outputs allow the use of inexpensive programmable logic to perform OAM&P functions. The
VSC8150 is an ideal solution for constructing a non-intrusive SONET/SDH monitoring interface when visibil-
ity of payload data is not required.
Functional Description
CLKIN
framing alarms generated. Incoming B1 parity is calculated and compared with the transmitted B1 value, and
detected errors are output. The 27 bytes of the first STS-1 transport overhead are descrambled and output for
processing.
VSC8150 Functional Block Diagram
RXSLBOUT+/-
RXSCLKIN+/-
The VSC8150 monitors an SONET/SDH signal in order to provide section and line data for Operations,
The VSC8150 high-speed interface receives recovered SONET/SDH data RXSIN
• Integrated 2.488 Gb/s Demultiplexer
• Outputs SONET/SDH Transport Overhead
• Support for Multiple SONET/SDH Rates
• B1 Calculation and Error Reporting
SELFRDET[1:0]
RATESEL[1:0]
RXSIN+/-
DISDSCRM
FRDETEN
LOS
and provides a re-timed data output RXSLBOUT
RESET
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896
DMX
1:8
VITESSE
SEMICONDUCTOR CORPORATION
RXPIN[7:0]
VITESSE SEMICONDUCTOR CORPORATION
FRAMER
RXPCLKIN
311MHz INTERNAL
CLOCK SOURCE
DESCRAMBLER
• LOF/SEF Alarm Generation
• Serial Data Loopthrough Output
• 100 PQFP Package
• Single 3.3V Supply Option
ALARM DETECTION
. Internally the data is framed and SEF/LOF
CONTROL
B1 CHECK
&
OVERHEAD
LATCH
2.488Gb/s SONET/SDH
Overhead Monitor
and clock RXS-
SOHCLK
SOHOUT[7:0]
B1ERR
RXFPOUT
RXFRERR
RXSEF
RXLOF
Page 1

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vsc8150 Summary of contents

Page 1

... B1 Calculation and Error Reporting General Description The VSC8150 monitors an SONET/SDH signal in order to provide section and line data for Operations, Administration, Maintenance, and Provisioning (OAM&P) at multiple SONET/SDH rates. Differential PECL clock and data input receivers and a differential data output isolate the high-speed interface. Low-speed TTL inputs and outputs allow the use of inexpensive programmable logic to perform OAM& ...

Page 2

... The frame boundary detection/verification is based on 12 bits of the A1/A2 overhead (See Figure 2) depending on the setting of the SELFRDET input (See Table 1). Frame acquisition is initiated when the FRDETEN input is held high. This control is level sensitive and the VSC8150 will continually perform frame acquisition as long as FRDETEN is held high; a suggested implementation is to short FRDETEN logically or physically to the SEF output ...

Page 3

... LOF defect is cancelled after an in-frame condition (RXSEF low) persists for a total of 3ms ( R6-61 ). Multiple SONET/SDH Rate Functionality The VSC8150 supports three SONET/SDH rates: STS-48/STM-16, STS-12/STM-4, and STS-3/STM-1. The user is responsible for rate-provisioning the device by setting the two inputs RATESEL[1:0] (See Table 2). ...

Page 4

... A block diagram illustrates this arrangement more clearly. (See Figure 3). Page 4 VITESSE SEMICONDUCTOR CORPORATION 741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896 VITESSE SEMICONDUCTOR CORPORATION Function RATESEL1 STS-3/STM-1 0 STS-12/STM-4 1 STS-48/STM-16 0 Invalid 1 Preliminary Data Sheet VSC8150 RATESEL0 G52186-0, Rev. 3.0 10/12/98 ...

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... Preliminary Data Sheet VSC8150 Figure 3: Suggested VSC8150 System Implementation VSC8150 B1ERR RXFPOUT SOHCLK SOHOUT[7:0] RXSEF RXLOF RXFRERR High Speed Interface Serial data received on the RXSIN+/- inputs is retimed on the falling edge of RXSCLKIN+/- clock and appears on the serial loopback output RXSLBOUT+/- (See Figure 11). This interface will pass data at all fre- quencies from ...

Page 6

... VITESSE SEMICONDUCTOR CORPORATION 741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896 VITESSE SEMICONDUCTOR CORPORATION Chip Boundary 1.65V Figure 5: High Speed Output Termination Preliminary Data Sheet VSC8150 1.65V 100 G52186-0, Rev. 3.0 10/12/98 ...

Page 7

... Preliminary Data Sheet VSC8150 The high speed data and clock output drivers consist of a differential pair designed to drive a 50 transmis- sion line. The transmission line should be terminated with a 100 resistor at the load between true and comple- ment outputs (See Figure 5). No connection to a termination voltage is required. The output driver is back terminated to 50 on-chip, providing a snubbing of any refl ...

Page 8

... Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896 VITESSE SEMICONDUCTOR CORPORATION Preliminary Data Sheet VSC8150 G52186-0, Rev. 3.0 10/12/98 ...

Page 9

... Preliminary Data Sheet VSC8150 AC Timing Characteristics SOHOUT[7: SOHCLK RXFPOUT Table 3: Overhead Output Timing (STS-48/STM-16 Mode) Parameter T Overhead output setup time with respect SOHCLK OHSU T Overhead output hold time with respect SOHCLK OHH T Overhead output clock period OHCLKW T Frame pulse setup time with respect to SOHCLK ...

Page 10

... Note: Generated Waveforms are synchronous and assume a 622MHz RXSCLKIN signal. Page 10 VITESSE SEMICONDUCTOR CORPORATION 741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896 VITESSE SEMICONDUCTOR CORPORATION T FPW T FERRPW T FERRSU T SEFSU T T B1SU Preliminary Data Sheet VSC8150 T B1PWH B1PWL — 51.4 — ns — 61.2 — ns — 25.7 — ns — 48.3 — ...

Page 11

... Preliminary Data Sheet VSC8150 Table 8: Framing and B1 Error Output Timing (STS-3/STM-1 Mode) T Frame Pulse Width FPW T Frame Boundary Error delay with respect to RXFPOUT FERRSU T Frame Boundary Error pulse width high FERRPW T SEF transition delay time with respect to RXFPOUT SEFSU T B1 Pulse train delay with respect to RXFPOUT ...

Page 12

... V = +3.3V, Outputs Open Description CC = +2.0V +3.3V, Outputs Open Description CC MM Preliminary Data Sheet VSC8150 Max Units Conditions Load = 100 Ohms 1200 mV across RXSLBOUT+/– at receiver Load = 100 Ohms 3000 mV across RXSLBOUT+/– at receiver - ps — 60 ohms — AC Coupled, internally mV biased to VCC/2 ...

Page 13

... Customer may require cooled/heatsink environment to meet thermal requirements of 100PQFP. (3) Contact factory for package thermal performance information. ESD Ratings Proper ESD procedures should be used when handling this product. The VSC8150 is rated to the following ESD voltages based on the human body model: 1. All pins are rated at or above 1500V. ...

Page 14

... SONET/SDH Overhead Monitor VSC8150 Package Pin Diagram VCC 1 VEE 2 VMM 3 VCC 4 VCC VCC 8 RXSCLKIN+ 9 RXSCLKIN– 10 VEE 11 RXSIN+ 12 RXSIN– 13 VEE 14 RXSLBOUT+ 15 RXSLBOUT– 16 VCC VCC 20 VCC 21 VMM 22 VEE 23 VCC Page 14 VITESSE SEMICONDUCTOR CORPORATION 741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896 ...

Page 15

... Preliminary Data Sheet VSC8150 Package Pin Description Table 14: Pin Definitions Signal VCC VEE VMM VCC VCC NC NC VCC RXSCLKIN+ RXSCLKIN- VEE RXSIN+ RXSIN- VEE RXSLBOUT+ RXSLBOUT- VCC NC NC VCC VCC VMM VEE VCC TEST TEST VCC VCC TEST TEST VEE TEST ...

Page 16

... PWR 66 PWR PWR PWR 73 PWR 74 PWR 75 PWR Preliminary Data Sheet VSC8150 Level Pin Description +3.3V +3.3V GND Test Input GND Test Input +2.0V TTL Active High (Tie to GND) TTL Descrambler Disable GND GND Test Input GND Test Input +3.3V +3.3V Leave Unconnected ...

Page 17

... Preliminary Data Sheet VSC8150 Table 14: Pin Definitions Signal LOS VCC VEE SOHOUT7 NC VEE RXLOF RXSEF VMM NC B1ERR VEE VCC RXFRERR RXFPOUT VMM RATESEL1 FRDETEN VEE SELFRDET1 SELFRDET0 VCC VCC RATESEL0 TEST Table 15: Power Supply Summary Signal 1,4,5,8,17,20,21, 24,28,29,38,39,48, VCC 49,52,54,55,62,66, 73,75,77,88,97,98 3,22,35,42,53,74, VMM 2,11,14,23,32,45, VEE 58,61,65,69,72,78, G52186-0, Rev. 3.0 10/12/98 741 Calle Plano, Camarillo, CA 93012 • ...

Page 18

... A 0.25 0.17 MAX L Page 18 VITESSE SEMICONDUCTOR CORPORATION 741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896 VITESSE SEMICONDUCTOR CORPORATION 100 PQFP Package Drawings HEATSINK INTRUSION .0127 MAX Preliminary Data Sheet VSC8150 Key mm Tolerance A 2.35 MAX A1 0.25 MAX A2 2.00 +.10/-.05 D 17.20 .25 D1 14.00 .10 E 17.20 ...

Page 19

... Vitesse Semiconductor Corporation’s product are not intended for use in life support appliances, devices or systems. Use of a Vitesse product in such applications without the written consent is prohibited. G52186-0, Rev. 3.0 10/12/98 741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896 VITESSE SEMICONDUCTOR CORPORATION VSC8150 QQ Package QQ: 100 PQFP, 14x14mm Body VITESSE SEMICONDUCTOR CORPORATION 2.488Gb/s SONET/SDH Overhead Monitor ...

Page 20

... SONET/SDH Overhead Monitor Page 20 VITESSE SEMICONDUCTOR CORPORATION 741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896 VITESSE SEMICONDUCTOR CORPORATION Preliminary Data Sheet VSC8150 G52186-0, Rev. 3.0 10/12/98 ...

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