mc100ep446 ON Semiconductor, mc100ep446 Datasheet - Page 2
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mc100ep446
Manufacturer Part Number
mc100ep446
Description
3.3v/5v 8??bit Cmos/ecl/ttl Data Input Parallel/serial Converter
Manufacturer
ON Semiconductor
Datasheet
1.MC100EP446.pdf
(20 pages)
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SYNC
SYNC
Table 1. PIN DESCRIPTION
* Pins will default LOW when left open.
**Pins will default HIGH when left open.
***The rising edge of SYNC will asynchronously reset the internal circuitry. The falling edge of the SYNC followed by the falling edge of CLK
D0*−D7*
S
CLK*, CLK*
PCLK, PCLK
SYNC*, SYNC**
CKSEL*
CKEN*, CKEN*
V
V
V
V
V
V
initiates the conversion process synchronously on the next rising edge of CLK.
V
V
V
V
V
OUT
CF
EF
BB1
CC
EE
BB2
CC
CC
CF
EF
EE
Warning: All V
to Power Supply to guarantee proper operation.
, V
, S
BB2
OUT
25
26
27
28
29
30
31
32
Figure 1. LQFP−32 Pinout (Top View)
24
1
PIN
CC
23
and V
2
22
3
EE
MC100EP446
MC10EP446
pins must be externally connected
21
4
20
5
19
6
ECL, CMOS, or TTL Parallel Data Input
ECL Differential Serial Data Output
ECL Differential Clock Input
ECL Differential Parallel Clock Output
ECL Conversion Synchronizing Differential Input (Reset)***
ECL Clock Input Selector
ECL Clock Enable Differential Input
ECL, CMOS, or TTL Input Selector
ECL Reference Mode Connection
Reference Voltage Output
Positive Supply
Negative Supply
18
7
17
8
16
15
14
13
12
10
11
http://onsemi.com
9
V
PCLK
PCLK
V
S
S
V
V
2
EE
CC
OUT
OUT
CC
CC
SYNC
SYNC
V
V
V
V
V
V
BB2
CC
CC
CF
EE
EF
25
26
27
28
29
30
31
32
FUNCTION
24
1
Figure 2. QFN−32 Pinout (Top View)
23
2
22
3
Exposed Pad (EP)
21
4
20
5
19
6
18
7
17
8
16
15
14
13
12
11
10
9
V
PCLK
PCLK
V
S
S
V
V
EE
CC
OUT
OUT
CC
CC