w83195bg-202 Winbond Electronics Corp America, w83195bg-202 Datasheet - Page 13

• Manufacturer Part Number: w83195bg-202
• Description: Clock For Via Chipsets
• Manufacturer: Winbond Electronics Corp America

7.6
7.7
BIT
BIT
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
Register 5: Watchdog Control (Default: 82h)
Register 6: PCIEX Control (1 = Enable, 0 = Stopped) (Default: FEh)
WD_TIMEOUT
SAF_FREQ [4]
SAF_FREQ [3]
SAF_FREQ [2]
SAF_FREQ [1]
SAF_FREQ [0]
SEL24_48
EN_WD
NAME
Reserved
Reserved
NAME
33,32
35,34
37,36
41,40
43,42
46,45
CLOCK GEN. FOR AMD K8 SYSTEM SERIES CHIPSET
PWD
1
0
0
0
0
0
1
0
PWD
24_48 MHz output selection, 1: 24 MHz (Default), 0: 48 MHz.
Default value follow hardware trapping data on SEL24_48# pin.
Program this bit =>
1: Enable Watchdog Timer feature.
0: Disable Watchdog Timer feature.
Read-back this bit =>
During timer count down the bit read back to 1.
If count to zero, this bit read back to 0.
Read Back only. Timeout Flag. This bit is Read Only.
1: Watchdog has ever started and counts to zero.
0: Watchdog is restarted and counting.
These bits will be reloaded in Reg-0 to select frequency table.
As the watchdog is timeout and EN_SAFE_FREQ=1.
1
1
1
1
1
1
1
0
Reserved
PCIEXT5/C5 output control
PCIEXT4/C4 output control
PCIEXT3/C3 output control
PCIEXT2/C2 output control
PCIEXT1/C1 output control
PCIEXT0/C0 output control
Reserved
W83195BR-202/W83195BG-202
- 9 -
DESCRIPTION
DESCRIPTION
Publication Release Date: Apr. 2006
Revision 0.6
TYPE
TYPE
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R