w83195bg-202 Winbond Electronics Corp America, w83195bg-202 Datasheet - Page 15

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w83195bg-202

Manufacturer Part Number
w83195bg-202
Description
Clock For Via Chipsets
Manufacturer
Winbond Electronics Corp America
Datasheet
7.11 Register 10: Reserved (Default: 03h)
7.12 Register 11: Spread Spectrum Programming (Default: 0Bh)
7.13 Register 12: Divisor Control (Default: 72h)
BIT
BIT
BIT
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
SRC_SPSPEN
SP_DOWN [3]
SP_DOWN [2]
SP_DOWN [1]
SP_DOWN [0]
N3VAL<6>
N3VAL<5>
N3VAL<4>
N3VAL<3>
N3VAL<2>
N3VAL<1>
N3VAL<0>
Reserved
Reserved
Reserved
Reserved
Reserved
SP_UP [3]
SP_UP [2]
SP_UP [1]
SP_UP [0]
KVAL2
KVAL1
NAME
NAME
NAME
CLOCK GEN. FOR AMD K8 SYSTEM SERIES CHIPSET
PWD
X
X
X
X
X
X
0
PWD
PWD
0
0
0
0
0
0
1
1
0
0
0
1
0
1
1
0
Reserved
Reserved
Reserved
Reserved
Define the CPU divider ratio
Refer to Table-2
Enable PCIEX spread spectrum feature,1: Enable, 0:
Disable
Programmable N3 divisor 6~0 for programmable PCIEX
clock.
The N3VAL<8>, N3VAL<7> default value is 1.
VCO =14.318MHz*(N+4)/ 56.
Spread Spectrum Up Counter bit 3 ~ bit 0.
Spread Spectrum Down Counter bit 3 ~ bit 0
2’s complement representation.
Ex: 1 -> 1111; 2 -> 1110; 7 -> 1001; 8 -> 1000
W83195BR-202/W83195BG-202
- 11 -
DESCRIPTION
DESCRIPTION
DESCRIPTION
Publication Release Date: Apr. 2006
Revision 0.6
TYPE
TYPE
TYPE
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W

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