cy7b9940v Cypress Semiconductor Corporation., cy7b9940v Datasheet - Page 7

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cy7b9940v

Manufacturer Part Number
cy7b9940v
Description
High Speed Multifrequency Pll Clock Buffer
Manufacturer
Cypress Semiconductor Corporation.
Datasheet

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Switching Characteristics
Over the Operating Range
Document Number: 38-07271 Rev. *C
t
t
t
t
t
t
t
t
t
Parameter
LOCK
RELOCK1
RELOCK2
ODCV
PWH
PWL
PDEV
OAZ
OZA
AC Test Loads and Waveform
See note. [22]
Notes
17. f
18. t
19. UI = Unit Interval. Examples: 1 UI is a full period. 0.1 UI is 10% of period.
20. Measured at 0.5V deviation from starting voltage.
21. For t
22. These figures are for illustration only. The actual ATE loads may vary.
NOM
PWH
OZA
must be within the frequency range defined by the same FS state.
is measured at 2.0V. t
minimum, C
PLL lock time from power up
PLL relock time (from same frequency, different phase) with
stable power supply
PLL Relock Time (from different frequency, different phase) with
Stable Power Supply
Output duty cycle deviation from 50%
Output HIGH time deviation from 50%
Output LOW time deviation from 50%
Period deviation when changing from reference to reference
DIS[1:2] HIGH to output high impedance from ACTIVE
DIS[1:2] LOW to output ACTIVE from output is high
impedance
For LOCK output only
R1 = 910Ω
R2 = 910 Ω
C
L
< 30 pF
L
= 0 pF. For t
(Includes fixture and
probe capacitance)
[20, 21]
[7, 8, 9, 10, 11]
PWL
is measured at 0.8V.
OZA
[17]
maximum, C
For all other outputs
R1 = 100Ω
R2 = 100Ω
C
(continued)
L
Description
< 25 pF up to 185 MHz
GND
3.3V
L
10 pF from 185 to 200 MHz
< 1 ns
= 25 pF to 18 MHz, 10 pF from 185 to 200 MHz.
[11]
[18]
(a) LVTTL AC Test Load
(b) TTL Input Test Waveform
[18]
0.8V
2.0V
OUTPUT
[12, 20]
C
[19]
L
3.3V
CY7B9930/40V-2 CY7B9930/40V-5
Min.
–1.0
1.0
0.5
2.0V
R1
R2
0.8V
< 1 ns
CY7B9930V, CY7B9940V
0.025
Max.
1000
500
1.0
1.5
2.0
10
10
14
RoboClockII™ Junior,
Min.
–1.0
1.0
0.5
0.025
Max.
1000
500
1.0
1.5
2.0
10
10
14
Page 7 of 11
Unit
ms
μs
μs
ns
ns
ns
UI
ns
ns
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