lv8104v Sanyo Semiconductor Corporation, lv8104v Datasheet - Page 18

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lv8104v

Manufacturer Part Number
lv8104v
Description
Three-phase Brushless Motor Predriver
Manufacturer
Sanyo Semiconductor Corporation
Datasheet
11. Clock disconnection protection circuit
12. Thermal shutdown circuit
13. Low-voltage protection circuit
14. Power supply stabilization
15. Ground lines
16. Integrating amplifier
17. FG amplifier
If the clock input through the CLK pin goes to the no input state in the motor drive state (the S/S pin : start, the BR pin :
brake release), the lower side output transistors (the UL, VL and WL side) are turned off. If the clock is resupplied, the
clock disconnection protection function is cancelled. When the clock period is longer than about thirty-fourth part of
the constraint protection set time, the clock disconnection protection circuit judges the clock input to be the no input
state and this protection function will operate.
If the junction temperature rises to the specified temperature (TSD) in the motor drive state (the S/S pin : start, the BR
pin : brake release), the lower side output transistors (the UL, VL and WL side) are turned off. If the junction
temperature falls to more than the hysteresis width (ΔTSD), the thermal shutdown function is cancelled.
The IC includes a low-voltage protection circuit to protect against incorrect operation when the V CC power is applied
or if the power supply voltage falls below its operating level. When the V CC voltage falls under the specified voltage
(VLVSD), all the outputs will be in the off state. If the V CC voltage rises to more than the hysteresis width (ΔVLVSD),
the low-voltage protection function is cancelled.
Since this IC is used in applications that flow the large output current, the power supply line is subject to fluctuations.
Therefore, capacitors with capacitance adequate to stabilize the power supply voltage must be connected between the
V CC pin and GND. If diodes are inserted in the power supply line to prevent the IC destruction due to reverse power
supply connection, since this makes the power supply voltage even more subject to fluctuations, even larger
capacitance will be required.
The signal system GND and the output system GND must be separated, and connected to one GND at the connector. As
the large current flows to the output system GND, this GND line must be made as short as possible.
The integrating amplifier integrates the speed error pulses and phase error pulses and converts them to the speed
command voltage. At that time it also sets the control loop gain and the frequency characteristics. External components
of the integrating amplifier must be placed as close to the IC as possible to reduce influence of noise.
The FG amplifier normally makes up a filter amplifier to reject noise. Since a clamp circuit has been added at the FG
amplifier output, the output amplitude is clamped at about 3.2Vp-p, even if the amplifier gain is increased.
After the FG amplifier, the Schmitt comparator on one side hysteresis(200mV (typical)) is inserted. The Schmitt
comparator output (FGS output) becomes high level when the FG amplifier output is lower than the FGIN + voltage,
and becomes low level when the FG amplifier output is higher to more than Schmitt width as compared with the FGIN +
voltage. Therefore, it is desirable that the amplifier gain be set so that the output amplitude is over 1.0Vp-p at the lowest
controlled speed to be used.
The capacitor connected between the FGIN + pin and GND is required for bias voltage stabilization. This capacitor
must be connected to the GND1 pin (pin 3) with a line that is as short as possible to reduce influence of noise.
As the FG amplifier and the FGS output are operating even if the S/S pin is the stop state, it is possible to monitor the
motor rotation by the FGS output.
Output system GND : GND for Rf and V CC line capacitors
Signal system GND : GND for the IC and external components
LV8104V
No.A1677-18/19

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