max98089 Maxim Integrated Products, Inc., max98089 Datasheet - Page 107
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max98089
Manufacturer Part Number
max98089
Description
Low-power, Stereo Audio Codec With Flexsound Technology
Manufacturer
Maxim Integrated Products, Inc.
Datasheet
1.MAX98089.pdf
(131 pages)
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Table 26. Distortion Limiter Registers
Traditional single-supply headphone amplifiers have
outputs biased at a nominal DC voltage (typically half
the supply). Large coupling capacitors are needed to
block this DC bias from the headphone. Without these
capacitors, a significant amount of DC current flows to
the headphone, resulting in unnecessary power dis-
sipation and possible damage to both headphone and
headphone amplifier.
Maxim’s second-generation DirectDrive architecture
uses a charge pump to create an internal negative sup-
ply voltage. This allows the headphone outputs of the ICs
to be biased at GND while operating from a single supply
(Figure 1). Without a DC component, there is no need for
the large DC-blocking capacitors. Instead of two large
(220µF typ) capacitors, the IC’s charge pump requires
3 small ceramic capacitors, conserving board space,
reducing cost, and improving the frequency response of
the headphone amplifier.
The dual-mode charge pump generates both the positive
and negative power supply for the headphone amplifier. To
maximize efficiency, both the charge pump’s switching fre-
quency and output voltage change based on signal level.
REGISTER
0x46
BIT
7
6
5
4
0
��������������������������������������������������������������� Maxim Integrated Products 107
DirectDrive Headphone Amplifier
THDCLP
THDT1
NAME
Distortion Limit
Measured in % THD+N.
Distortion Limiter Release Time Constant
Duration of time required for the speaker amplifier’s output gain to adjust back to the
nominal level after a large signal has passed.
0 = 1.4s
1 = 2.8s
Headphone
Charge Pump
Low-Power, Stereo Audio Codec
VALUE
0x0
0x1
0x2
0x3
0x4
0x5
0x6
0x7
with FlexSound Technology
THD+N LIMIT (%)
Limiter disabled
When the input signal level is less than 10% of PVDD,
the switching frequency is reduced to a low rate. This
minimizes switching losses in the charge pump. When
the input signal exceeds 10% of PVDD, the switching fre-
quency increases to support the load current.
For input signals below 25% of PVDD, the charge pump
generates Q(PVDD/2) to minimize the voltage drop
across the amplifier’s power stage and thus improve
efficiency. Input signals that exceed 25% of PVDD cause
the charge pump to output QPVDD. The higher output
voltage allows for full output power from the headphone
amplifier.
To prevent audible gliches when transitioning from the
Q(PVDD/2) output mode to the QPVDD output mode, the
charge pump transitions very quickly. This quick change
draws significant current from PVDD for the duration of
the transition. The bypass capacitor on PVDD supplies
the required current and prevents droop on PVDD.
The charge pump’s dynamic switching mode can be
turned off through the I
can then be forced to output either Q(PVDD/2) or QPVDD
regardless of input signal level.
< 1
10
1
2
4
6
8
DESCRIPTION
VALUE
2
0xA
0xB
0xC
0xD
0x8
0x9
0xE
0xF
C interface. The charge pump
MAX98089
THD+N LIMIT (%)
12
14
16
18
20
21
22
24