74hct7403 NXP Semiconductors, 74hct7403 Datasheet - Page 14
74hct7403
Manufacturer Part Number
74hct7403
Description
4-bit X 64-word Fifo Register; 3-state
Manufacturer
NXP Semiconductors
Datasheet
1.74HCT7403.pdf
(28 pages)
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Philips Semiconductors
Master reset applied with FIFO full
Notes to Fig.8
1. DIR LOW, output ready HIGH; assume FIFO is full
2. MR pulse LOW; clears FIFO
3. DIR goes HIGH; flag indicates input prepared for valid data
4. DOR goes LOW; flag indicates FIFO empty
5. Q
September 1993
4-Bit x 64-word FIFO register; 3-state
(1) HC : V
Fig.8 Waveforms showing the MR input to DIR, DOR and Q
n
HCT: V
outputs go LOW (only last bit will be reset).
M
M
= 50%; V
= 1.3 V; V
I
= GND to V
I
= GND to 3 V.
CC
.
handbook, halfpage
DIR OUTPUT
DOR OUTPUT
MR INPUT
Q n OUTPUT
2
1
14
t PLH
t PHL
t PHL
V M
n
(1)
output propagation delays and the MR pulse width.
t
W
3
4
V M
V M
5
(1)
(1)
MGA668
74HC/HCT7403
Product specification
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