74hct7403 NXP Semiconductors, 74hct7403 Datasheet - Page 4

• Manufacturer Part Number: 74hct7403
• Description: 4-bit X 64-word Fifo Register; 3-state
• Manufacturer: NXP Semiconductors

Philips Semiconductors
FUNCTIONAL DESCRIPTION
A DIR flag indicates the input stage
status, either empty and ready to
receive data (DIR = HIGH) or full and
busy (DIR = LOW). When DIR and SI
are HIGH, data present at D
shifted into the input stage; once
complete DIR goes LOW. When SI is
set LOW, data is automatically shifted
to the output stage or to the last
empty location. A FIFO which can
receive data is indicated by DIR set
HIGH.
A DOR flag indicates the output stage
status, either data available (DOR =
HIGH) or busy (DOR = LOW). When
SO and DOR are HIGH, data is
available at the outputs (Q
When SO is set LOW new data may
be shifted into the output stage, once
complete DOR is set HIGH.
September 1993
4-Bit x 64-word FIFO register; 3-state
DATA INPUT
DIR
MR
OE
SI
0
0
to Q
to D
4
3
).
3
is
SI
DIR
D nA
A
A
MR
Expanded format (see Fig.17)
The DOR and DIR signals are used to
allow the “7403” to be cascaded. Both
parallel and serial expansion is
possible.
Serial expansion is only possible with
typical devices.
Parallel expansion
Parallel expansion is accomplished
by logically ANDing the DOR and DIR
signals to form a composite signal.
FIFO A
7403
Fig.4 Functional diagram.
OE
DOR A
SO A
Q nA
4
4
DIR
SI
D nB
B
MR
B
FIFO B
7403
OE
DOR B
Q nB
SO B
MGA679
Serial expansion
Serial expansion is accomplished by:
4
tying the data outputs of the first
device to the data inputs of the
second device
connecting the DOR pin of the first
device to the SI pin of the second
device
connecting the SO pin of the first
device to the DIR pin of the second
device.
DOR
SO
DATA OUTPUT
74HC/HCT7403
Product specification