74hct7403 NXP Semiconductors, 74hct7403 Datasheet - Page 15

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74hct7403

Manufacturer Part Number
74hct7403
Description
4-bit X 64-word Fifo Register; 3-state
Manufacturer
NXP Semiconductors
Datasheet
Philips Semiconductors
Notes to Fig.9
1. DOR HIGH; no data transfer in progress, valid data is present at output stage
2. SO set HIGH; results in DOR going LOW
3. DOR goes LOW; output stage “busy”
4. SO set LOW; data in the input stage is unloaded, and new data replaces it as empty location “bubbles-up” to input
5. DOR goes HIGH; transfer process completed, valid data present at output after the specified propagation delay
6. Repeat process to unload the 3rd through to the 64th word from FIFO
7. DOR remains LOW; FIFO is empty.
September 1993
handbook, full pagewidth
4-Bit x 64-word FIFO register; 3-state
(1) HC : V
Fig.9
stage
HCT: V
Waveforms showing the SO input to DOR output propagation delay. The SO pulse widths and maximum
pulse frequency.
M
M
= 50%; V
= 1.3 V; V
SO INPUT
DOR OUTPUT
Q n OUTPUT
I
= GND to V
I
= GND to 3 V.
CC
.
1
t PHL
1st SO pulse
2
1st word
1/ f max
3
t PLH
V M
(1)
t
V M
4
W
(1)
5
15
2nd word
2nd SO pulse
V M
(1)
6
64th SO pulse
64th word
74HC/HCT7403
7
MGA661
Product specification

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