pll130-69 PhaseLink Corp., pll130-69 Datasheet - Page 4

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pll130-69

Manufacturer Part Number
pll130-69
Description
High Speed Translator Buffers Single Ended To Pecl Or Lvds - Phaselink Corporation
Manufacturer
PhaseLink Corp.
Datasheet
6. LVDS Electrical Characteristics
7. LVDS Switching Characteristics
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 11/29/04 Page 4
Output Differential Voltage
V
Output High Voltage
Output Low Voltage
Offset Voltage
Offset Magnitude Change
Power-off Leakage
Output Short Circuit Current
Differential Clock Rise Time
Differential Clock Fall Time
DD
Magnitude Change
PARAMETERS
PARAMETERS
OUT
OUT
LVDS Levels Test Circuit
High Speed Translator Buffers: Single ended to PECL or LVDS
OUT
OUT
V
V
DIFF
OD
SYMBOL
SYMBOL
50:
50:
20%
'V
'V
I
I
V
V
V
V
OXD
OSD
LVDS Transistion Time Waveform
0V
t
t
OD
OH
OS
OL
r
f
V
OD
OS
OS
t
R
0V (Differential)
80%
V
CONDITIONS
out
CONDITIONS
(see figure)
(see figure)
C
R
R
V
= V
L
L
L
DD
= 100 :
= 100 :
= 10 pF
DD
= 0V
or GND
80%
OUT
OUT
LVDS Switching Test Circuit
t
F
20%
1.125
MIN.
MIN.
247
-50
0.9
0.2
0.2
C
C
0
L
L
= 10pF
= 10pF
PLL130-68/-69
TYP.
TYP.
-5.7
355
0.5
0.5
1.4
1.1
1.2
r1
V
3
DIFF
MAX.
MAX.
1.375
r10
454
1.0
1.0
1.6
50
25
-8
R
L
= 100:
UNITS
UNITS
mV
mV
mV
mA
uA
ns
ns
V
V
V

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