adf4106-ep Analog Devices, Inc., adf4106-ep Datasheet

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adf4106-ep

Manufacturer Part Number
adf4106-ep
Description
Pll Frequency Synthesizer Adf4106-ep
Manufacturer
Analog Devices, Inc.
Datasheet
FEATURES
6.0 GHz bandwidth
2.7 V to 3.3 V power supply
Separate charge pump supply (V
Programmable dual-modulus prescaler
Programmable charge pump currents
Programmable antibacklash pulse width
3-wire serial interface
Analog and digital lock detect
Hardware and software power-down mode
Support defense and aerospace applications (AQEC)
Military temperature range (−55°C to +125°C)
Controlled manufacturing baseline
One assembly/test site
One fabrication site
Enhanced product change notification
Qualification data available upon request
APPLICATIONS
Broadband wireless access
Satellite systems
Instrumentation
Wireless LANS
Base stations for wireless radios
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
8/9, 16/17, 32/33, 64/65
voltage in 3 V systems
RF
RF
REF
DATA
CLK
IN
IN
LE
IN
A
B
24-BIT INPUT
REGISTER
SD
OUT
PRESCALER
FUNCTION
AV
LATCH
CE
P/P + 1
FROM
DD
22
P
N = BP + A
AGND DGND
DV
) allows extended tuning
DD
A, B COUNTER
R COUNTER
R COUNTER
FUNCTION
LATCH
LATCH
LATCH
14-BIT
LOAD
LOAD
B COUNTER
A COUNTER
FUNCTIONAL BLOCK DIAGRAM
14
13-BIT
6-BIT
6
13
19
Figure 1.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
GENERAL DESCRIPTION
The ADF4106-EP frequency synthesizer can be used to
implement local oscillators in the up-conversion and down-
conversion sections of wireless receivers and transmitters. It
consists of a low noise, digital phase frequency detector (PFD),
a precision charge pump, a programmable reference divider,
programmable A counter and B counter, and a dual-modulus
prescaler (P/P + 1). The A (6-bit) counter and B (13-bit) counter, in
conjunction with the dual-modulus prescaler (P/P + 1), implement
an N divider (N = BP + A). In addition, the 14-bit reference
counter (R counter) allows selectable REF
PFD input. A complete phase-locked loop (PLL) can be
implemented if the synthesizer is used with an external loop
filter and voltage controlled oscillator (VCO). Its very high
bandwidth means that frequency doublers can be eliminated in
many high frequency systems, simplifying system architecture
and reducing cost.
Additional application and technical information can be found
in the
V
P
FREQUENCY
DETECTOR
DETECT
PLL Frequency Synthesizer
ADF4106
CPGND
PHASE
LOCK
SD
AV
OUT
DD
CPI3 CPI2 CPI1
data sheet.
SETTING 1
CURRENT
M3 M2 M1
MUX
©2010 Analog Devices, Inc. All rights reserved.
REFERENCE
CHARGE
PUMP
ADF4106-EP
CPI6 CPI5 CPI4
HIGH Z
SETTING 2
CURRENT
ADF4106-EP
R
SET
IN
frequencies at the
CP
MUXOUT
www.analog.com

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adf4106-ep Summary of contents

Page 1

... Trademarks and registered trademarks are the property of their respective owners. PLL Frequency Synthesizer GENERAL DESCRIPTION The ADF4106-EP frequency synthesizer can be used to implement local oscillators in the up-conversion and down- conversion sections of wireless receivers and transmitters. It consists of a low noise, digital phase frequency detector (PFD), ...

Page 2

... ADF4106-EP TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 General Description ......................................................................... 1 Functional Block Diagram .............................................................. 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Timing Characterisitics ............................................................... 4 REVISION HISTORY 11/10—Rev Rev. A Changes to Figure 6.......................................................................... 7 Changes to Figure 11........................................................................ 8 Changes to Ordering Guide .......................................................... 10 8/10—Revision 0: Initial Version   Absolute Maximum Ratings ............................................................5   ESD Caution...................................................................................5   Pin Configurations and Function Descriptions ............................6   ...

Page 3

... /5.5 V min/V max max 9.0 mA typical 11.5 mA max 9.5 mA typical 13 mA max 10.5 mA typical 0.4 mA max T = 25° μA typ Rev Page ADF4106- MAX 5.1 kΩ SET = 5.1 kΩ SET = 25°C A ≤ V − 0 ≤ V − 0 ≤ V ≤ 5.5 V ...

Page 4

... ADF4106-EP Parameter NOISE CHARACTERISTICS Normalized Phase Noise Floor (PN SYNTH 11 Normalized 1/f Noise (PN ) 1_f 12 Phase Noise Performance 900 MHz 13 14 5800 MHz 15 5800 MHz Spurious Signals 13 900 MHz 14 5800 MHz 15 5800 MHz 1 Operating temperature range is −55°C to +125°C. 2 This is the maximum operating frequency of the CMOS counters. The prescaler value should be chosen to ensure that the RF input is divided down to a frequency that is less than this value ...

Page 5

... ESD rating of <2 kV, and it is ESD sensitive. Proper precautions −0 0 should be taken for handling and assembly. −0 0 −40°C to +85°C ESD CAUTION −65°C to +125°C 150°C 112°C/W 30.4°C/W 260°C 40 sec 6425 303 Rev Page ADF4106-EP ...

Page 6

... CP MAX R SET = 5.1 kΩ mA. SET CP MAX Rev Page CPGND 1 PIN 1 15 MUXOUT INDICATOR 14 LE AGND 2 ADF4106-EP 13 DATA AGND 3 12 CLK TOP VIEW (Not to Scale) IN NOTES 1. TRANSISTOR COUNT 6425 (CMOS), 303 (BIPOLAR). 2. THE EXPOSED PAD MUST BE CONNECTED TO AGND ...

Page 7

... Figure 8. Integrated Phase Noise (900 MHz, 200 kHz, and 20 kHz) –100 –93.0dBc/Hz –100 1kHz 2kHz Rev Page ADF4106-EP 10dB/DIV R = –40dBc/Hz L RMS NOISE = 0.36° 100Hz FREQUENCY OFFSET FROM 900MHz CARRIER 0 REF LEVEL = –14.0dBm –10 ...

Page 8

... ADF4106-EP –70 –80 –90 –100 –110 –120 –130 –140 –150 –160 –170 1k 10k 100k 1M FREQUENCY OFFSET (Hz) Figure 11. Integrated Phase Noise (5.8 GHz,1 MHz, and 100 kHz 3V, V REF LEVEL = –10dBm 5mA –10 CP PFD FREQUENCY = 1MHz LOOP BANDWIDTH = 100kHz –20 RES BANDWIDTH = 1kHz VIDEO BANDWIDTH = 1kHz – ...

Page 9

... If vias are used, they should be incorporated in the thermal pad at 1.2 mm pitch grid. The via diameter should be between 0.3 mm and 0.33 mm, and the via barrel should be plated with 1 oz. copper to plug the via. The user should connect the PCB thermal pad to AGND. Rev Page ADF4106-EP ...

Page 10

... ADF4106-EP OUTLINE DIMENSIONS 0.15 0.05 PIN 1 INDICATOR 12° MAX 1.00 0.85 0.80 SEATING PLANE ORDERING GUIDE 1 Model Temperature Range ADF4106-SRU-EP −55° 125°C ADF4106-SRU-EP-R7 −55° 125°C ADF4106-SCPZ-EP −55° 125°C ADF4106-SCPZ-EP-R7 −55° 125° RoHS Compliant Part. 5.10 5.00 4. 4.50 6.40 4.40 BSC 4. PIN 1 1 ...

Page 11

... NOTES Rev Page ADF4106-EP ...

Page 12

... ADF4106-EP NOTES ©2010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D09272-0-11/10(A) Rev Page ...

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