hd74hc668 Renesas Electronics Corporation., hd74hc668 Datasheet

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hd74hc668

Manufacturer Part Number
hd74hc668
Description
Synchronous Up/down Decade Counter
Manufacturer
Renesas Electronics Corporation.
Datasheet
HD74HC668, HD74HC669
Synchronous UP/Down Decade Counter
Synchronous Up/Down 4-bit binary Counter
Description
This synchronous presettable decade counter features an internal carry look-ahead for cascading in high-speed counting
applications. Synchronous operation is provided by having all flip-flops clocked simultaneously so that the outputs
change coincident with each other when so instructed by the count-enable inputs and internal gating. This mode of
operation helps eliminate the output counting spikes that are normally associated with asynchronous (ripple-clock)
counters.
A buffered clock input triggers the four master-slave flip-flops on the rising (positive going) edge of the clock
waveform. This counter is fully programmable; that is, the outputs may each be preset to either level. The load input
circuitry allows loading with the carry-enable output of cascaded counters. As loading is synchronous, setting up a low
level at the load input disables the counter and causes the outputs to agree with the data inputs after the next clock pulse.
The carry look-ahead circuitry provides for cascading counters for n-bit synchronous applications without additional
gating. Instrumental in accomplishing this function are two count enable inputs and a carry output. Both count enable
inputs (P and T) must be low to count. The direction of the count is determined by the level of the up/down input.
when the input is high, the counter counts up; when low, it counts down. Input T is fed forward to enable the carry
output. The carry output thus enabled will produce a low-level output pulse with a duration approximately equal to the
high portion of the Q
counting down. This low level overflow carry pulse can be used to enable successive cascaded stages. Transitions at
the enable P or T inputs are allowed regardless of the level of the clock input. All inputs are diode-clamped to minimize
transission-line effects, thereby simplifying system design. This counter features a fully independent clock circuit.
Changes at control inputs (enable P, Enable T, load, up/down) that will modify the operating mode have no effect until
clocking occurs. The function of the counter (whether enabled, disabled, loading, or counting) will be dictated solely
by the conditions meeting the stable setup and hold times.
Features
Note: Please consult the sales office for the above package availability.
Rev.2.00 Mar 30, 2006 page 1 of 10
HD74HC669P
HD74HC669FPEL
HD74HC668RPEL
HD74HC669RPEL
High Speed Operation
High Output Current: Fanout of 10 LSTTL Loads
Wide Operating Voltage: V
Low Input Current: 1 A max
Low Quiescent Supply Current: I
Ordering Information
Part Name
A
DILP-16 pin
SOP-16 pin (JEITA)
SOP-16 pin (JEDEC)
output when counting up and approximately equal to the low portion of the Q
Package Type
CC
= 2 to 6 V
CC
(static) = 4 A max (Ta = 25 C)
PRDP0016AE-B
(DP-16FV)
PRSP0016DH-B
(FP-16DAV)
PRSP0016DG-A
(FP-16DNV)
(Previous Code)
Package Code
P
FP
RP
Abbreviation
Package
EL (2,000 pcs/reel)
EL (1,000 pcs/reel)
Taping Abbreviation
(Previous ADE-205-520)
(Quantity)
REJ03D0638-0200
A
output when
Mar 30, 2006
Rev.2.00

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hd74hc668 Summary of contents

Page 1

... HD74HC668, HD74HC669 Synchronous UP/Down Decade Counter Synchronous Up/Down 4-bit binary Counter Description This synchronous presettable decade counter features an internal carry look-ahead for cascading in high-speed counting applications. Synchronous operation is provided by having all flip-flops clocked simultaneously so that the outputs change coincident with each other when so instructed by the count-enable inputs and internal gating. This mode of operation helps eliminate the output counting spikes that are normally associated with asynchronous (ripple-clock) counters ...

Page 2

... HD74HC668, HD74HC669 Pin Arrangement HD74HC668 Data inputs Enable P GND HD74HC669 Data inputs Enable P GND Rev.2.00 Mar 30, 2006 page U (Top view) U ...

Page 3

... HD74HC668, HD74HC669 Logic Diagram HD74HC668 U Load Enable P Enable T CK HD74HC669 U Load Enable P Enable T CK Rev.2.00 Mar 30, 2006 page ...

Page 4

... HD74HC668, HD74HC669 Timing Chart HD74HC668 Load A B Data inputs C D Clock U/D Enable P and Ripple carry output Load Rev.2.00 Mar 30, 2006 page Count up Inhibit Count down ...

Page 5

... HD74HC668, HD74HC669 HD74HC669 Load A B Data inputs C D Clock U/D P and Ripple carry output 13 Load Absolute Maximum Ratings Item Supply voltage range Input / Output voltage Input / Output diode current Output current V , GND current CC Power dissipation Storage temperature Note: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of which may be realized at the same time ...

Page 6

... HD74HC668, HD74HC669 Recommended Operating Conditions Item Supply voltage Input / Output voltage Operating temperature *1 Input rise / fall time Note: 1. This item guarantees maximum limit when one input switches. Waveform: Refer to test circuit of switching characteristics. Electrical Characteristics Item Symbol V (V) CC Input voltage V 2 ...

Page 7

... HD74HC668, HD74HC669 Switching Characteristics (C Item Symbol V CC Maximum clock f 2.0 max Frequency 4.5 6.0 Propagation delay t 2.0 PLH time t 4.5 PHL 6.0 t 2.0 PLH t 4.5 PHL 6.0 t 2.0 PLH t 4.5 PHL 6.0 t 2.0 PLH t 4.5 PHL 6.0 Pulse width t 2.0 w 4.5 6.0 Setup time t 2.0 su 4.5 6.0 t 2.0 su 4.5 6.0 t 2.0 su 4.5 6.0 t 2.0 su 4.5 6.0 Hold time t 2.0 h 4.5 6.0 Output rise/fall t 2.0 TLH time t 4.5 THL 6.0 Input capacitance Cin — ...

Page 8

... HD74HC668, HD74HC669 Test Circuit V CC Input Pulse Generator = 50 Ω Z out Input Pulse Generator = 50 Ω Z out Note : 1. C includes probe and jig capacitance. L Rev.2.00 Mar 30, 2006 page Output QA U/D Output Clock A QB Output Output D Enable P QD Output Load C Ripple Enable T ...

Page 9

... HD74HC668, HD74HC669 Package Dimensions JEITA Package Code RENESAS Code P-DIP16-6.3x19.2-2.54 PRDP0016AE 0. JEITA Package Code RENESAS Code P-SOP16-5.5x10.06-1.27 PRSP0016DH Index mark Rev.2.00 Mar 30, 2006 page Previous Code MASS[Typ.] DP-16FV 1.05g Previous Code MASS[Typ ...

Page 10

... HD74HC668, HD74HC669 JEITA Package Code RENESAS Code P-SOP16-3.95x9.9-1.27 PRSP0016DG Index mark Rev.2.00 Mar 30, 2006 page Previous Code MASS[Typ.] FP-16DNV 0.15g NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT INCLUDE TRIM OFFSET. ...

Page 11

Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead ...

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