hcf4029b STMicroelectronics, hcf4029b Datasheet

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hcf4029b

Manufacturer Part Number
hcf4029b
Description
Presettable Up/down Counter Binary Or Bcd Decade
Manufacturer
STMicroelectronics
Datasheet

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DESCRIPTION
HCF4029B is a monolithic integrated circuit
fabricated
technology available in DIP and SOP packages.
HCF4029B consists of a four stage binary or
BCD-decade up/down counter with provisions for
look ahead carry in both counting modes. The
PIN CONNECTION
September 2002
MEDIUM SPEED OPERATION : 8MHz (Typ.)
at C
MULTI-PACKAGE PARALLEL CLOCKING
FOR SYNCHRONOUS HIGH SPEED
OUTPUT RESPONSE OR RIPPLE
CLOCKING FOR SLOW CLOCK INPUT RISE
AND FALL TIMES
"PRESET ENABLE" AND INDIVIDUAL "JAM"
INPUTS PROVIDED
BINARY OR DECADE UP/DOWN
COUNTING
BCD OUTPUTS IN DECADE MODE
QUIESCENT CURRENT SPECIF. UP TO 20V
STANDARDIZED SYMMETRICAL OUTPUT
CHARACTERISTICS
INPUT LEAKAGE CURRENT
I
100% TESTED FOR QUIESCENT CURRENT
MEETS ALL REQUIREMENTS OF JEDEC
JESD13B "STANDARD SPECIFICATIONS
FOR DESCRIPTION OF B SERIES CMOS
DEVICES"
I
= 100nA (MAX) AT V
L
= 50pF and V
in
Metal
DD
Oxide
DD
- V
= 18V T
SS
= 10V
Semiconductor
A
= 25°C
PRESETTABLE UP/DOWN COUNTER
ORDER CODES
inputs consist of a single CLOCK, CARRY IN
(CLOCK
DOWN, PRESET ENABLE, and four individual
JAM signals. Q1, Q2, Q3, Q4 and a CARRY OUT
signal are provided as outputs. A high PRESET
ENABLE signal allows information on the JAM
INPUTS to preset the counter to any state
asynchronously with the clock. A low on each JAM
line, when the PRESET-ENABLE signal is high,
resets the counter to its zero count. The counter
advances one count at the positive transition of
the clock when the CARRY-IN and PRESET
ENABLE signals are low. Advancement is
inhibited when the CARRY-IN or PRESET
ENABLE signals are high. The CARRY-OUT
PACKAGE
SOP
DIP
BINARY OR BCD DECADE
ENABLE),
DIP
HCF4029BM1
HCF4029BEY
TUBE
BINARY/DECADE,
HCF4029B
HCF4029M013TR
SOP
T & R
UP/
1/12

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hcf4029b Summary of contents

Page 1

... HCF4029B is a monolithic integrated circuit fabricated in Metal Oxide technology available in DIP and SOP packages. HCF4029B consists of a four stage binary or BCD-decade up/down counter with provisions for look ahead carry in both counting modes. The PIN CONNECTION September 2002 PRESETTABLE UP/DOWN COUNTER BINARY OR BCD DECADE ...

Page 2

... HCF4029B signal is normally high and the counter reaches its maximum count in the UP mode or the minimum count in the DOWN mode provided the CARRY-IN signal is low. The CARRY-IN signal in the low state can thus be considered a CLOCK ENABLE. The CARRY-IN terminal must be connected to V when not in use. Binary counting is ...

Page 3

... X X: Don’t Care LOGIC DIAGRAM TRUTH TABLE Q Q CONTROL INPUT BIN/DEC H L UP/DOWN PRESET ENABLE CARRY IN HCF4029B LOGIC LEVEL ACTION H Binary Count L Decade Count H Up Count L Down Count H Jam Jam H No Counter L Advance counter 3/12 ...

Page 4

... HCF4029B TIMING CHART - Binary Mode TIMING CHART - Decade Mode 4/12 ...

Page 5

... Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. All voltage values are referred to V pin voltage. SS RECOMMENDED OPERATING CONDITIONS Symbol V Supply Voltage DD V Input Voltage I T Operating Temperature op Parameter Parameter HCF4029B Value Unit -0.5 to + 200 mW 100 mW -55 to +125 °C -65 to +150 ° ...

Page 6

... HCF4029B DC SPECIFICATIONS Symbol Parameter V (V) I Quiescent Current 0/5 L 0/10 0/15 0/20 V High Level Output 0/5 OH Voltage 0/10 0/15 V Low Level Output 5/0 OL Voltage 10/0 15/0 V High Level Input IH Voltage V Low Level Input IL Voltage I Output Drive 0/5 OH Current 0/5 0/10 0/15 I Output Sink 0/5 OL Current 0/10 0/15 I Input Leakage I 0/18 Current C Input Capacitance I The Noise Margin for both "1" and "0" level is: 1V min. with V ...

Page 7

... PRESET ENABLE HCF4029B = 50pF 200K , ns Value (*) Min. Typ. Max. 250 500 120 240 90 180 280 560 130 260 95 190 100 200 50 100 ...

Page 8

... HCF4029B Symbol Parameter t t Propagation Delay Time PHL PLH (Carry Output) (3) Minimum Setup Time t setup (Carry In) t Minimum Hold Time hold (Carry In) (*) Typical temperature coefficient for all V (1) If more than one unit is cascated in the parallel clocked application t delay at 15pF and the transition time of the carry output driving stage for the estimated capacitance load. ...

Page 9

... WAVEFORM 1 : PROPAGATION DELAY TIMES (f=1MHz; 50% duty cycle) WAVEFORM 2 : PROPAGATION DELAY TIMES (f=1MHz; 50% duty cycle) HCF4029B 9/12 ...

Page 10

... HCF4029B DIM. MIN. a1 0. 10/12 Plastic DIP-16 (0.25) MECHANICAL DATA mm. TYP MAX. 1.65 0.5 0.25 20 8.5 2.54 17.78 7.1 5.1 3.3 1.27 inch MIN. TYP. MAX. 0.020 0.030 0.065 0.020 0.010 0.787 0.335 0.100 0.700 0.280 0.201 0.130 0.050 P001C ...

Page 11

... 9 3.8 G 4 mm. TYP MAX. MIN. 1.75 0.2 0.003 1.65 0.46 0.013 0.25 0.007 0.5 45˚ (typ.) 10 0.385 6.2 0.228 1.27 8.89 4.0 0.149 5.3 0.181 1.27 0.019 0.62 ˚ (max.) 8 HCF4029B inch TYP. MAX. 0.068 0.007 0.064 0.018 0.010 0.019 0.393 0.244 0.050 0.350 0.157 0.208 0.050 0.024 PO13H 11/12 ...

Page 12

... HCF4029B Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice ...

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