74lvc2g07gm NXP Semiconductors, 74lvc2g07gm Datasheet

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74lvc2g07gm

Manufacturer Part Number
74lvc2g07gm
Description
Buffers With Open-drain Outputs
Manufacturer
NXP Semiconductors
Datasheet

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Part Number
Manufacturer
Quantity
Price
Part Number:
74LVC2G07GM
Manufacturer:
NEXPERIA/安世
Quantity:
20 000
1. General description
2. Features
The 74LVC2G07 provides two non-inverting buffers.
The output of this device is an open drain and can be connected to other open-drain
outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions.
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this
device in a mixed 3.3 V and 5 V environment.
Schmitt trigger action at all inputs makes the circuit tolerant for slower input rise and fall
time.
This device is fully specified for partial power-down applications using I
circuitry disables the output, preventing the damaging backflow current through the device
when it is powered down.
74LVC2G07
Buffers with open-drain outputs
Rev. 04 — 21 May 2007
Wide supply voltage range from 1.65 V to 5.5 V
5 V tolerant input/output for interfacing with 5 V logic
High noise immunity
Complies with JEDEC standard:
ESD protection:
CMOS low power consumption
Latch-up performance exceeds 250 mA
Direct interface with TTL levels
Inputs accept voltages up to 5 V
Multiple package options
Specified from 40 C to +85 C and 40 C to +125 C
24 mA output drive (V
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8-B/JESD36 (2.7 V to 3.6 V)
HBM JESD22-A114E exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
CC
= 3.0 V)
Product data sheet
OFF
. The I
OFF

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74lvc2g07gm Summary of contents

Page 1

Buffers with open-drain outputs Rev. 04 — 21 May 2007 1. General description The 74LVC2G07 provides two non-inverting buffers. The output of this device is an open drain and can be connected to other open-drain outputs to implement active-LOW ...

Page 2

... Package Temperature range Name 74LVC2G07GW +125 C 74LVC2G07GV +125 C 74LVC2G07GM +125 C 74LVC2G07GF +125 C 4. Marking Table 2. Marking Type number 74LVC2G07GW 74LVC2G07GV 74LVC2G07GM 74LVC2G07GF 5. Functional diagram mnb092 Fig 1. Logic symbol 74LVC2G07_4 Product data sheet Description SC-88 plastic surface-mounted package ...

Page 3

... NXP Semiconductors 6. Pinning information 6.1 Pinning 74LVC2G07 GND 001aab670 Fig 4. Pin configuration SOT363 and SOT457 6.2 Pin description Table 3. Pin description Symbol Pin 1A 1 GND Functional description [1] Table 4. Function table Input nA ...

Page 4

... NXP Semiconductors 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter V supply voltage CC I input clamping current IK V input voltage I I output clamping current OK V output voltage O I output current ...

Page 5

... NXP Semiconductors 10. Static characteristics Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter [ +85 C amb V HIGH-level input IH voltage V LOW-level input IL voltage V LOW-level output OL voltage I input leakage current OFF-state output OZ current I power-off leakage OFF ...

Page 6

... NXP Semiconductors Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter +125 C amb V HIGH-level input IH voltage V LOW-level input IL voltage V LOW-level output OL voltage I input leakage current OFF-state output OZ current I power-off leakage OFF current I supply current ...

Page 7

... NXP Semiconductors 11. Dynamic characteristics Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V). For test circuit see Symbol Parameter Conditions t propagation delay nA to nY; see power dissipation V = GND capacitance [1] Typical values are measured the same as t and t ...

Page 8

... NXP Semiconductors Table 9. Measurement points Supply voltage Input 1. 1.95 V 0.5 2 2.7 V 0.5 2.7 V 1 3.6 V 1 5.5 V 0.5 Test data is given in Table 10. Definitions for test circuit Load resistance Load capacitance including jig and probe capacitance Termination resistance should be equal to the output impedance Z ...

Page 9

... NXP Semiconductors 13. Package outline Plastic surface-mounted package; 6 leads y 6 pin 1 index DIMENSIONS (mm are the original dimensions UNIT max 0.30 1.1 0.25 mm 0.1 0.8 0.20 0.10 OUTLINE VERSION IEC SOT363 Fig 9. Package outline SOT363 (SC-88) 74LVC2G07_4 Product data sheet ...

Page 10

... NXP Semiconductors Plastic surface-mounted package (TSOP6); 6 leads y 6 pin 1 index 1 e DIMENSIONS (mm are the original dimensions UNIT b p 0.1 0.40 1.1 0.26 mm 0.013 0.25 0.9 0.10 OUTLINE VERSION IEC SOT457 Fig 10. Package outline SOT457 (TSOP6) 74LVC2G07_4 Product data sheet scale ...

Page 11

... NXP Semiconductors XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1. (2) terminal 1 index area DIMENSIONS (mm are the original dimensions) ( UNIT b D max max 0.25 1.5 mm 0.5 0.04 0.17 1.4 Notes 1. Including plating thickness. 2. Can be visible in some manufacturing processes. OUTLINE VERSION ...

Page 12

... NXP Semiconductors XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 0 (1) terminal 1 index area DIMENSIONS (mm are the original dimensions UNIT b D max max 0.20 1.05 mm 0.5 0.04 0.12 0.95 Note 1. Can be visible in some manufacturing processes. OUTLINE VERSION IEC SOT891 Fig 12. Package outline SOT891 (XSON6) ...

Page 13

... The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name where appropriate. • Added type number 74LVC2G07GM (XSON6/SOT886 package). • Added type number 74LVC2G07GF (XSON6/SOT891 package). • Section 10 “Static Changed: Conditions for input leakage and supply current ...

Page 14

... For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail ...

Page 15

... NXP Semiconductors 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 Functional description . . . . . . . . . . . . . . . . . . . 3 8 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 7 12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 13 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9 14 Abbreviations ...

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