cs5323gdw20 ON Semiconductor, cs5323gdw20 Datasheet - Page 10

• Manufacturer Part Number: cs5323gdw20
• Description: Three-phase Buck Controller With 5-bit Dac
• Manufacturer: ON Semiconductor

SWNODE
COMP − Offset
CSA Out + V
Inductive Current Sensing
inductor as shown below in Figure 7. In the diagram, L is the
output inductance and R
To compensate the current sense signal the values of R1 and
C1 are chosen so that L/R
the current sense signal will be the same shape as the
inductor current, the voltage signal at Cx will represent the
instantaneous value of inductor current and the circuit can be
analyzed as if a sense resistor of value R
resistor (R
inductive sensing, tolerances and temperature effects should
be considered. Cores with a low permeability material or a
large gap will usually have minimal inductance change with
temperature and load. Copper magnet wire has a
temperature coefficient of 0.39% per °C. The increase in
winding resistance at higher temperatures should be
For lossless sensing current can be sensed across the
When choosing or designing inductors for use with
V
Figure 7. Lossless Inductive Current Sensing with
SWNODE
V
FB
CSA Out
OUT
(V
OUT
S
FB
).
)
Figure 6. Open Loop Operation
R
L
L
R1
C1
Enhanced V
DAC
L
COMP
CS
V
CS
L
FB
is the inherent inductor resistance.
REF
= R1 × C1. If this criteria is met
X
OUT
T1
OFFSET
+
CSA
E.A.
+
2
T2
L
was used as a sense
+
+
+
+
http://onsemi.com
COMP
PWM-
10
considered when setting the I
accurate current sense is required than inductive sensing can
provide, current can be sensed through a resistor as shown
in Figure 5.
Current Sharing Accuracy
of the current sense resistance depending on where the
current sense signal is picked off. For accurate current
sharing, the current sense inputs should sense the current at
the same point for each phase and the connection to the
CS
cases, especially with inductive sensing, resistance of the
pcb can be useful for increasing the current sense
resistance.) The total current sense resistance used for
calculations must include any pcb trace between the CS
inputs and the CS
the current sense element will determine the accuracy of
current sharing between phases. The worst case Current
Sense Amplifier Input Mismatch is 5 mV and will typically
be within 3 mV. The difference in peak currents between
phases will be the CSA Input Mismatch divided by the
current sense resistance. If all current sense elements are of
equal resistance a 3 mV mismatch with a 2 mΩ sense
resistance will produce a 1.5 A difference in current between
phases.
Operation at > 50% Duty Cycle
will exhibit subharmonic oscillation unless a compensation
ramp is added to each phase. A circuit like the one on the left
side of Figure 8 can be added to each current sense network
to implement slope compensation. The value of R1 can be
varied to adjust the ramp size.
PCB traces that carry inductor current can be used as part
Current Sense Amplifier Input Mismatch and the value of
For operation at duty cycles above 50% Enhanced V
REF
Figure 8. External Slope Compensation Circuit
GATE(L)X
should be made so that no phase is favored. (In some
MMBT2222LT1
3 k
Slope Comp
REF
Circuit
input that carries inductor current.
0.1
R1
1.0 nF
μ
F
LIM
Existing Current
Switch Node
Sense Circuit
threshold. If a more
.01
25 k
μ
F
CS
CS
X
REF
2