adv7181b Analog Devices, Inc., adv7181b Datasheet - Page 67
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adv7181b
Manufacturer Part Number
adv7181b
Description
Multiformat Sdtv Video Decoder
Manufacturer
Analog Devices, Inc.
Datasheet
1.ADV7181B.pdf
(100 pages)
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I
The following registers are located in Register Access Page 2.
Table 83. Interrupt Register Map Bit Names
Register
Name
Interrupt
Config 0
Reserved
Interrupt
Status 1
Interrupt
Clear 1
Interrupt
Maskb 1
Reserved
Interrupt
Status 2
Interrupt
Clear 2
Interrupt
Maskb 2
Raw Status 3
Interrupt
Status 3
Interrupt
Clear 3
Interrupt
Maskb 3
1
2
To access the Interrupt Register map, the bits of the register access page[1:0] in Register Address 0x0E must be programmed to 01b.
C REGISTER MAP DETAILS
Reset
Value
0001 x000
x000 0000
x000 0000
0xxx 0000
0xxx 0000
xx00 0000
xx00 0000
rw
rw
r
w
rw
r
w
rw
r
r
w
rw
Subaddress
Dec
64
65
66
67
68
69
70
71
72
73
74
75
76
Hex
0x40
0x41
0x42
0x43
0x44
0x45
0x46
0x47
0x48
0x49
0x4A
0x4B
0x4C
1
Bit 7
INTRQ_
DUR_SEL.1
MPU_
STIM_
INTRQ_Q
MPU_
STIM_INT
RQ_CLR
MPU_
STIM_INT
RQ_MSKB
Rev. B | Page 67 of 100
Bit 6
INTRQ_
DUR_SEL.0
MV_PS_
CS_Q
MV_PS_
CS_CLR
MV_PS_
CS_MSKB
Bit 5
MV_INTRQ
_SEL.1
SD_FR_
CHNG_Q
SD_FR_
CHNG_CLR
SD_FR_
CHNG_
MSKB
PAL_SW_
LK_
CHNG_Q
PAL_SW_
LK_CHNG
_CLR
PAL_SW_
LK_CHNG
_MSKB
Bit 4
MV_INTRQ
_SEL.0
SCM_
LOCK
SCM_
LOCK_
CHNG_Q
SCM_
LOCK_
CHNG_CLR
SCM_
LOCK_CH
NG_MSKB
Bit 3
WSS_
CHNGD_Q
WSS_
CHNGD_
CLR
WSS_CHN
GD_MSKB
SD_AD_
CHNG_Q
SD_AD_
CHNG_
CLR
SD_AD_
CHNG_
MSKB
Bit 2
MPU_
STIM_INTRQ
CGMS_
CHNGD_Q
CGMS_
CHNGD_
CLR
CGMS_
CHNGD_
MSKB
SD_H_
LOCK
SD_H_
LOCK_
CHNG_Q
SD_H_
LOCK_
CHNG_CLR
SD_H_
LOCK_CH
NG_MSKB
Bit 1
INTRQ_
OP_SEL.1
SD_
UNLOCK_Q
SD_UNLO
CK_CLR
SD_
UNLOCK_
MSKB
GEMD_Q
GEMD_
CLR
GEMD_
MSKB
SD_V_
LOCK
SD_V_
LOCK_
CHNG_Q
SD_V_LO
CK_CHNG
_CLR
SD_V_
LOCK_CH
NG_MSKB
ADV7181B
SD_OP_
CHNG_CLR
Bit 0
INTRQ_
OP_SEL.0
SD_LOCK_
Q
SD_LOCK
_CLR
SD_LOCK
_MSKB
CCAPD_Q
CCAPD_
CLR
CCAPD_
MSKB
SD_OP_
50HZ
SD_OP_
CHNG_Q
SD_OP_
CHNG_
MSKB