adsp-2195mkca-160x Analog Devices, Inc., adsp-2195mkca-160x Datasheet - Page 53
adsp-2195mkca-160x
Manufacturer Part Number
adsp-2195mkca-160x
Description
Dsp Microcomputer
Manufacturer
Analog Devices, Inc.
Datasheet
1.ADSP-2195MKCA-160X.pdf
(68 pages)
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Figure 29. P
The load capacitance should include the processor’s
package capacitance (C
includes driving the load high and then back low. Address
and data pins can drive high and low at a maximum rate of
1/(2t
frequency of 1/t
can switch on each cycle. For example, estimate P
the following assumptions:
• A system with one bank of external data memory—asyn-
• One 64K 16 RAM chip is used with a load of 10 pF
• Maximum peripheral speed HCLK = 100 MHz
• External data memory writes occur every other cycle, a
• The bus cycle time is 100 MHz (t
REV. PrA
September 2001
chronous RAM (16-bit)
rate of 1/(4t
CK
). The write strobe can switch every cycle at a
EXT
HCLK
CK
This information applies to a product under development. Its characteristics and specifications are subject to change with-
out notice. Analog Devices assumes no obligation regarding future manufacturing unless otherwise agreed to in writing.
Calculation
P
. Select pins switch at 1/(2t
), with 50% of the pins switching
EXT
=
IN
). The switching frequency
O C
For current information contact Analog Devices at 800/262-5643
V
DD
HCLK
2
= 10 nsec)
f
CK
), but selects
EXT
with
ADSP-2195
53
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