adsp-21462 Analog Devices, Inc., adsp-21462 Datasheet - Page 27
adsp-21462
Manufacturer Part Number
adsp-21462
Description
Sharc Processor
Manufacturer
Analog Devices, Inc.
Datasheet
1.ADSP-21462.pdf
(62 pages)
- Current page: 27 of 62
- Download datasheet (819Kb)
Preliminary Technical Data
Precision Clock Generator (Direct Pin Routing)
This timing is only valid when the SRU is configured such that
the precision clock generator (PCG) takes its inputs directly
from the DAI pins (via pin buffers) and sends its outputs
directly to the DAI pins. For the other cases, where the PCG’s
Table 23. Precision Clock Generator (Direct Pin Routing)
1
Parameter
Timing Requirements
t
t
t
Switching Characteristics
t
t
t
t
D = FSxDIV, PH = FSxPHASE. For more information, see the ADSP-2146x SHARC Processor Hardware Reference, “Precision Clock Generators”
chapter.
Normal mode of operation.
PCGIW
STRIG
HTRIG
DPCGIO
DTRIGCLK
DTRIGFS
PCGOW
1
Input Clock Period
PCG Trigger Setup Before Falling Edge of PCG Input
Clock
PCG Trigger Hold After Falling Edge of PCG Input
Clock
PCG Output Clock and Frame Sync Active Edge Delay
After PCG Input Clock
PCG Output Clock Delay After PCG Trigger
PCG Frame Sync Delay After PCG Trigger
Output Clock Period
PCG_TRIGx_I
PCG_CLKx_O
PCG_EXTx_I
PCG_FSx_O
DAI_Pn
DPI_Pn
DAI_Py
DPI_Py
DAI_Pm
DPI_Pm
(CLKIN)
DAI_Pz
DPI_Pz
t
STRIG
Figure 14. Precision Clock Generator (Direct Pin Routing)
Rev. PrC | Page 27 of 62 | January 2009
t
t
DTRIGCLK
DPCGIO
t
HTRIG
t
DTRIGFS
ADSP-21462/ADSP-21465/ADSP-21467/ADSP-21469
Min
TBD
TBD
TBD
TBD
TBD
TBD
TBD
t
t
inputs and outputs are not directly routed to/from DAI pins (via
pin buffers) there is no timing data available. All timing param-
eters and switching characteristics apply to external DAI pins
(DAI_P01 – DAI_P20).
PCGIW
DPCGIO
t
PCGOW
Max
TBD
TBD
TBD
TBD
TBD
TBD
TBD
Unit
ns
ns
ns
ns
ns
ns
ns
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