adsp-bf548 Analog Devices, Inc., adsp-bf548 Datasheet - Page 50

• Manufacturer Part Number: adsp-bf548
• Description: Blackfin Embedded Processor
• Manufacturer: Analog Devices, Inc.

ADSP-BF542/ADSP-BF544/ADSP-BF547/ADSP-BF548/ADSP-BF549
NAND Flash Controller Interface Timing
Table 32
Page 53
Table 32. NAND Flash Controller Interface Timing
1
Parameter
Write Cycle
Switching Characteristics
t
t
t
t
t
t
t
t
t
t
t
Read Cycle
Switching Characteristics
t
t
t
t
t
Timing Requirements
t
Data Setup Time for a Read Transaction
t
Write Followed by Read
Switching Characteristics
t
WR_DLY and RD_DLY are defined in the NFC_CTL register.
CWL
CH
CLHWL
CLH
ALLWL
ALH
WP
WHWL
WC
DWS
DWH
CRL
CRH
RP
RHRL
RC
DRS
DRH
WHRL
1
1
1
1
1
describe NAND Flash Controller Interface operations.
and
Figure 20 on Page 51
ND_CE Setup Time to AWE Low
ND_CE Hold Time From AWE High
ND_CLE Setup Time High to AWE Low
ND_CLE Hold Time From AWE High
ND_ALE Setup Time Low to AWE Low
ND_ALE Hold Time From AWE High
AWE Low to AWE High
AWE High to AWE Low
AWE Low to AWE Low
Data Setup Time for a Write Access
Data Hold Time for a Write Access
ND_CE Setup Time to ARE Low
ND_CE Hold Time From ARE High
ARE Low to ARE High
ARE High to ARE Low
ARE Low to ARE Low
Data Hold Time for a Read Transaction
AWE High to ARE Low
through
Figure 24 on
Rev. A | Page 50 of 88 | October 2008
Min
1.0 × t
3.0 × t
0.0
2.5 × t
0.0
2.5 × t
(WR_DLY +1.0) × t
4.0 × t
(WR_DLY +5.0) × t
(WR_DLY +1.5) × t
2.5 × t
1.0 × t
3.0 × t
(RD_DLY +1.0) × t
4.0 × t
(RD_DLY + 5.0) × t
8.0
0.0
5.0 × t
SCLK
SCLK
SCLK
SCLK
SCLK
SCLK
SCLK
SCLK
SCLK
SCLK
– 4
– 4
– 4
– 4
– 4
– 4
– 4
– 4
– 4
– 4
SCLK
SCLK
SCLK
SCLK
SCLK
– 4
– 4
– 4
– 4
– 4
Max
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns