mc68hc908gr16 Freescale Semiconductor, Inc, mc68hc908gr16 Datasheet - Page 164

no-image

mc68hc908gr16

Manufacturer Part Number
mc68hc908gr16
Description
M68hc08 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
mc68hc908gr16CFA
Manufacturer:
FREESCALE
Quantity:
2 650
Part Number:
mc68hc908gr16CFA
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
mc68hc908gr16CFA
Manufacturer:
FREESCALE
Quantity:
2 650
Part Number:
mc68hc908gr16CFA
Manufacturer:
FREESCALE
Quantity:
20 000
Part Number:
mc68hc908gr16CFJ
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
mc68hc908gr16MFA
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Enhanced Serial Communications Interface (ESCI) Module
RE — Receiver Enable Bit
RWU — Receiver Wakeup Bit
SBK — Send Break Bit
14.8.3 ESCI Control Register 3
ESCI control register 3 (SCC3):
R8 — Received Bit 8
164
Setting this read/write bit enables the receiver. Clearing the RE bit disables the receiver but does not
affect receiver interrupt flag bits. Reset clears the RE bit.
This read/write bit puts the receiver in a standby state during which receiver interrupts are disabled.
The WAKE bit in SCC1 determines whether an idle input or an address mark brings the receiver out
of the standby state and clears the RWU bit. Reset clears the RWU bit.
Setting and then clearing this read/write bit transmits a break character followed by a 1. The 1 after the
break character guarantees recognition of a valid start bit. If SBK remains set, the transmitter
continuously transmits break characters with no 1s between them. Reset clears the SBK bit.
When the ESCI is receiving 9-bit characters, R8 is the read-only ninth bit (bit 8) of the received
character. R8 is received at the same time that the SCDR receives the other 8 bits.
1 = Receiver enabled
0 = Receiver disabled
1 = Standby state
0 = Normal operation
1 = Transmit break characters
0 = No break characters being transmitted
Stores the ninth ESCI data bit received and the ninth ESCI data bit to be transmitted.
Enables these interrupts:
Receiver overrun
Noise error
Framing error
Parity error
Address:
Writing to the RE bit is not allowed when the enable ESCI bit (ENSCI) is
clear. ENSCI is in ESCI control register 1.
Do not toggle the SBK bit immediately after setting the SCTE bit. Toggling
SBK before the preamble begins causes the ESCI to send a break
character instead of a preamble.
Reset:
Read:
Write:
$0015
Bit 7
R8
U
Figure 14-12. ESCI Control Register 3 (SCC3)
= Unimplemented
T8
6
0
MC68HC908GR16 Data Sheet, Rev. 5.0
R
5
0
NOTE
NOTE
R
R
4
0
= Reserved
ORIE
3
0
NEIE
U = Unaffected
2
0
FEIE
1
0
Freescale Semiconductor
PEIE
Bit 0
0

Related parts for mc68hc908gr16