mc68hc908gp32 Freescale Semiconductor, Inc, mc68hc908gp32 Datasheet - Page 126
mc68hc908gp32
Manufacturer Part Number
mc68hc908gp32
Description
M68hc08 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC68HC908GP32.pdf
(266 pages)
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Input/Output (I/O) Ports
Figure 12-15
When bit DDRDx is a logic 1, reading address $0003 reads the PTDx data latch. When bit DDRDx is a
logic 0, reading address $0003 reads the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit.
126
PTDPUE Bit
Notes:
1. X = Don’t care
2. Hi-Z = High impedance
3. Writing affects data register, but does not affect input.
4. I/O pin pulled up to V
X
1
0
shows the port D I/O logic.
For those devices packaged in a 40-pin dual in-line package, PTD6 and
PTD7 are not connected. DDRD6 and DDRD7 should be set to a 1 to
configure PTD6 and PTD7 as outputs.
DDRD Bit
0
0
1
READ DDRD ($0007)
WRITE DDRD ($0007)
WRITE PTD ($0003)
READ PTD ($0003)
PTDPUEx
DD
by internal pullup device.
PTD Bit
X
X
X
(1)
Table 12-5. Port D Pin Functions
RESET
Figure 12-15. Port D I/O Circuit
MC68HC908GP32 Data Sheet, Rev. 10
I/O Pin Mode
Input, Hi-Z
Input, V
V
Output
DD
INTERNAL
PULLUP
DEVICE
DD
Table 12-5
(4)
(2)
NOTE
DDRDx
PTDx
Accesses to DDRD
DDRD7–DDRD0
DDRD7–DDRD0
DDRD7–DDRD0
Read/Write
summarizes the operation of the port D pins.
PTD7–PTD0
Read
Pin
Pin
Accesses to PTD
Freescale Semiconductor
PTDx
PTD7–PTD0
PTD7–PTD0
PTD7–PTD0
Write
(3)
(3)
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