mc68hc908gp32 Freescale Semiconductor, Inc, mc68hc908gp32 Datasheet - Page 170
mc68hc908gp32
Manufacturer Part Number
mc68hc908gp32
Description
M68hc08 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC68HC908GP32.pdf
(266 pages)
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System Integration Module (SIM)
Figure 14-16
14.6.2 Stop Mode
In stop mode, the SIM counter is reset and the system clocks are disabled. An interrupt request from a
module can cause an exit from stop mode. Stacking for interrupts begins after the selected stop recovery
time has elapsed. Reset or break also causes an exit from stop mode.
The SIM disables the clock generator module outputs (CGMOUT and CGMXCLK) in stop mode, stopping
the CPU and peripherals. Stop recovery time is selectable using the SSREC bit in the mask option
register (MOR). If SSREC is set, stop recovery is reduced from the normal delay of 4096 CGMXCLK
cycles down to 32. This is ideal for applications using canned oscillators that do not require long startup
times from stop mode.
170
and
EXITSTOPWAIT
CGMXCLK
Note: EXITSTOPWAIT = RST pin, CPU interrupt, or break interrupt
External crystal applications should use the full stop recovery time by
clearing the SSREC bit unless the OSCSTOPEN bit is set in CONFIG2.
Figure 14-17
RST
IDB
IAB
IDB
IAB
$A6
Figure 14-16. Wait Recovery from Interrupt or Break
Figure 14-17. Wait Recovery from Internal Reset
$A6
$6E0B
$A6
show the timing for WAIT recovery.
$6E0B
$A6
MC68HC908GP32 Data Sheet, Rev. 10
$A6
$A6
CYCLES
$6E0C
32
$01
NOTE
$00FF
CYCLES
32
$0B
$00FE
$6E
RST VCT H RST VCT L
$00FD
$00FC
Freescale Semiconductor
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