mc68hc908gp20 Freescale Semiconductor, Inc, mc68hc908gp20 Datasheet - Page 301
mc68hc908gp20
Manufacturer Part Number
mc68hc908gp20
Description
M68hc08 Family Of 8-bit Microcontroller Units Mcus
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC68HC908GP20.pdf
(406 pages)
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19.6.1.1 Hardware Interrupts
MC68HC908GP20
Freescale Semiconductor
NOTE:
—
Rev 2.1
A hardware interrupt does not stop the current instruction. Processing of
a hardware interrupt begins after completion of the current instruction.
When the current instruction is complete, the SIM checks all pending
hardware interrupts. If interrupts are not masked (I bit clear in the
condition code register) and if the corresponding interrupt enable bit is
set, the SIM proceeds with interrupt processing; otherwise, the next
instruction is fetched and executed.
If more than one interrupt is pending at the end of an instruction
execution, the highest priority interrupt is serviced first.
demonstrates what happens when two interrupts are pending. If an
interrupt is pending upon exit from the original interrupt service routine,
the pending interrupt is serviced before the LDA instruction is executed.
The LDA opcode is prefetched by both the INT1 and INT2 RTI
instructions. However, in the case of the INT1 RTI prefetch, this is a
redundant operation.
To maintain compatibility with the M6805 Family, the H register is not
pushed on the stack during interrupt entry. If the interrupt service routine
modifies the H register or uses the indexed addressing mode, software
should save the H register and then restore it prior to exiting the routine.
INT1
INT2
Figure 19-11
CLI
LDA
PSHH
PULH
RTI
PSHH
PULH
RTI
#$FF
.
Interrupt Recognition Example
INT1 INTERRUPT SERVICE ROUTINE
INT2 INTERRUPT SERVICE ROUTINE
Advance Information
Figure 19-11
BACKGROUND
ROUTINE
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