mc68hc908gp20 Freescale Semiconductor, Inc, mc68hc908gp20 Datasheet - Page 337

• Manufacturer Part Number: mc68hc908gp20
• Description: M68hc08 Family Of 8-bit Microcontroller Units Mcus
• Manufacturer: Freescale Semiconductor, Inc

20.13.5 CGND (Clock Ground)
MC68HC908GP20
Freescale Semiconductor
—
Rev 2.1
When an SPI is configured as a master, the SS input can be used in
conjunction with the MODF flag to prevent multiple masters from driving
MOSI and SPSCK. (See
SS pin to set the MODF flag, the MODFEN bit in the SPSCK register
must be set. If the MODFEN bit is low for an SPI master, the SS pin can
be used as a general-purpose I/O under the control of the data direction
register of the shared I/O port. With MODFEN high, it is an input-only pin
to the SPI regardless of the state of the data direction register of the
shared I/O port.
The CPU can always read the state of the SS pin by configuring the
appropriate pin as an input and reading the port data register. (See
Table
CGND is the ground return for the serial clock pin, SPSCK, and the
ground for the port output buffers. It is internally connected to V
shown in
Note 1. X = Don’t care
SPE
0
1
1
1
20-3.)
SPMSTR
Table
X
0
1
1
(1)
20-1.
MODFEN
Table 20-3. SPI Configuration
X
X
0
1
20.8.2 Mode Fault
Master without MODF
SPI Configuration
Master with MODF
Not enabled
Slave
Error.) For the state of the
General-purpose I/O;
General-purpose I/O;
State of SS Logic
SS ignored by SPI
SS ignored by SPI
Input-only to SPI
Input-only to SPI
Advance Information
SS
as
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