mc68hc908jw32 Freescale Semiconductor, Inc, mc68hc908jw32 Datasheet - Page 186

• Manufacturer Part Number: mc68hc908jw32
• Description: M68hc08 Microcontrollers Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

External Interrupt (IRQ)
14.5 PTE3/D– Pin
The PTE3 pin is configured as an interrupt input to trigger the IRQ interrupt when the following conditions
are satisfied:
Setting PTE3IE configures the PTE3 pin to an input pin with an internal pullup device. The PTE3 interrupt
is "ORed" with the IRQ input to trigger the IRQ interrupt
register affects both the IRQ pin and the PTE pin. An interrupt on PTE3 also sets the PTE3 interrupt flag,
PTE3IF, in the IRQ option control register (IOCR).
14.6 IRQ Module During Break Interrupts
The system integration module (SIM) controls whether the IRQ latch can be cleared during the break
state. The BCFE bit in the break flag control register (BFCR) enables software to clear the latches during
the break state. (See
To allow software to clear the IRQIRQ latch during a break interrupt, write a logic 1 to the BCFE bit. If a
latch is cleared during the break state, it remains cleared when the MCU exits the break state.
To protect the latches during the break state, write a logic 0 to the BCFE bit. With BCFE at logic 0 (its
default state), writing to the ACK bit in the IRQ status and control register during the break state has no
effect on the IRQ latch.
14.7 IRQ Status and Control Register
The IRQ status and control register (ISCR) controls and monitors operation of the IRQ module. The ISCR
has the following functions:
IRQF — IRQ Flag
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This read-only status bit is high when the IRQ interrupt is pending.
1 = IRQ interrupt pending
0 = IRQ interrupt not pending
The USB module is disabled
PTE3 pin configured for external interrupt input (PTE3IE = 1)
Shows the state of the IRQ flag
Clears the IRQ latch
Masks IRQ interrupt request
Controls triggering sensitivity of the IRQ pin
Address:
Reset:
Read:
Write:
Chapter 6 System Integration Module
$001E
Bit 7
Figure 14-3. IRQ Status and Control Register (ISCR)
0
0
= Unimplemented
6
0
0
MC68HC908JW32 Data Sheet, Rev. 5
5
0
0
4
0
0
Figure
IRQF
(SIM).)
3
0
14-1. Therefore, the IRQ status and control
ACK
2
0
0
IMASK
1
0
Freescale Semiconductor
MODE
Bit 0
0