mc68hc908mr32 Freescale Semiconductor, Inc, mc68hc908mr32 Datasheet - Page 56

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mc68hc908mr32

Manufacturer Part Number
mc68hc908mr32
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Analog-to-Digital Converter (ADC)
ADICLK — ADC Input Clock Select Bit
MODE1:MODE0 — Modes of Result Justification Bits
56
ADICLK selects either bus clock or CGMXCLK as the input clock source to generate the internal ADC
clock. Reset selects CGMXCLK as the ADC clock source.
If the external clock (CGMXCLK) is equal to or greater than 1 MHz, CGMXCLK can be used as the
clock source for the ADC. If CGMXCLK is less than 1 MHz, use the PLL-generated bus clock as the
clock source. As long as the internal ADC clock is at f
19.13 Analog-to-Digital Converter (ADC)
MODE1:MODE0 selects among four modes of operation. The manner in which the ADC conversion
results will be placed in the ADC data registers is controlled by these modes of operation. Reset returns
right-justified mode.
1 = Internal bus clock
0 = External clock, CGMXCLK
00 = 8-bit truncation mode
01 = Right justified mode
10 = Left justified mode
11 = Left justified sign data mode
f
ADIC
=
MC68HC908MR32 • MC68HC908MR16 Data Sheet, Rev. 6.1
CGMXCLK or bus frequency
ADIV[2:0]
Characteristics.
ADIC
, correct operation can be guaranteed. See
Freescale Semiconductor

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